Dynamic Engineering PMC-BISERIAL-III RL1, Руководство пользователя

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RL1_USER_SWITCH
[0x0004] User Switch Port (read only)
Dip-Switch Port
Data Bit Description
31-20 Spare
19 PLL Sdata Input
18-16 Spare
15-8 Xilinx Design Revision Number
7-0 Switch Setting
FIGURE 5 PMC-BISERIAL-III RL1 USER SWITCH PORT
Switch Setting: The user switch is read through this port. The bits are read as the
lowest byte in the port. Access the read-only port as a long word and mask off the
undefined bits. The dip-switch positions are defined in the silkscreen. For example the
switch figure below indicates a 0x12.
Xilinx Design Revision Number: The value of the second byte of this port is the rev.
number of the Xilinx design (currently 0x01 - rev. A.)
PLL Sdata Input: The PLL_sdata bi-directional line is read using this bit. This line is
used to read the register contents of the PLL.
1
7 0
0