Datum Systems M7 Series, Инструкция по установке и эксплуатации

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Maintenance M7/M7L/M7LT Modular Satellite Modem
3-100 M7/M7L/M7LT - Rev. 0.05
The FIFO may also be re-centered at any time on command from either the front panel or via the
remote control. At the front panel the command is
<Intf: Status - Rcv Buffer>
and pressing the “1”
key, then "Enter" to confirm. Pressing the “0” key on this parameter will clear the “Slip Status”.
3.9.3. Master/Slave Network
In this network configuration, one station is considered the master (hub) and the other station(s) is
considered the slave (remote).
The master transmit timing is either an input to (External or Terminal timing) or output from (Internal)
the master station modulator. The slave station receive data clock maintains this synchronization
(RCV Clock). The receive data clock is used by the local network to generate the contra
–directional
transmit timing (loop timing). If the slave local network requires timing from the modulator, RCV Clock
is selected for the modulator timing option. Alternatively, if the local network will derive timing from
the receive timing signal and return a timing clock synchronous with the transmit data, then Terminal
Timing would be selected for the modulator timing option.
3.9.4. Master/Master
In this network configuration, both stations are considered a master. This would be required for any
connection between local networks that operate on their own network timing standard. This is typical
within Telco networks running G.703 as an interface at the modem.
At both ends of the satellite link, the transmit timing is typically derived from the incoming network
timing standard. In the case of G.703, this will be derived from the data signal but in the case of a
serial interface, this can either an input to (External or Terminal timing) or output from (Internal) the
modulator.
At both ends of the satellite link, the recovered receive timing signal is used to input the data into the
FIFO Buffer. The FIFO buffer output clock is selected from a source that contains the local network
timing signal. This is typically the set to Mod Clock which has derived the network timing from the
local network.
NOTE: In a Master/Master network, there is expected to be a FIFO buffer slip at some point in time.
The time between FIFO buffer slips is determined by the time base offset between the two (2)
master clocks and the size of the FIFO buffer. When this slip occurs, there will be a loss of
data equivalent to approximately one half the size of the FIFO buffer.