M7/M7L/M7LT Modular Satellite Modem
Operation
M7/M7L/M7LT - Rev. 0.05
1-11
The other two printed circuit assemblies are the Front Panel Control Assembly, and the common
backplane assembly.
In addition the main demodulator PWB can accept a plug-in sub-assembly for optional TPC Forward
Error Correction (FEC). All other FEC functions such as standard Viterbi, TCM and Reed-Solomon
are contained in FPGA on the modulator and demodulator assemblies. LDPC is an optional FEC set
which is loaded into the existing FPGAs.
Doppler
FIFO Buffer
FEC
Encoder
Baseband Signal
Processing
Modulator
TData
V.35/Intelsat
and
Differential
Encoder
Programmabl
e Attenuator
Processor Control
Option
Interface
Connector
P1
Intf
Option
Card
Serial
IP
HSSI
RData
Option
Interface
Connector
P1
XMT Out
70/140
MHz
FEC
Decoder
Baseband Signal
Processing
Demodulator
V.35/Intelsat
and
Differential
Decoder
Front end
AGC/Amp
A/D
Conversion
RCV In
70/140
MHz
Out Clk
In Clk
Modem
Reference
Oscillator
Interface & Loop-
Back Circuits
DSP Aquisition
Processor
25 dB
Loopback
Attenuator
Term
Term
Low
Pass
Filter
Term
Ext. Reference In
Clock
Control
Aux.
Con-
nection
at J4
Modulator Card
Demodulator Card
Controller/M&C Card
Interface Card
Intf
Option
Card
Serial,
IP or
HSSI
Rdata
LVDS
Tdata
LVDS
Figure 1-8 - Modem Block Diagram
Содержание M7 Series
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