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Xtium2-CXP PX8 Reference
Xtium2-CXP PX8 User's Manual
Xtium2-CXP PX8 Reference
Block Diagram
Host PCI Express X8 (or greater) Slot
DTE
Data-Transf er-Engine
with O LUT
PCI Express Gen3 X8 Controller
Xtium2-CXP PX8
Simplified Block Diagram
Data
Data
Shaft Encoder A/B
I/O Controller
L2
CXP Status Indicator
Frame Buffer and
DMA table Memory
(2 GB)
Opto-coupled
4 Trigger/General Inputs
TTL
8 Strobe/General Outputs
J7 — DH60-27P
J8 — 40-pin IDC
* Caution — connect only to one, never both
RS-422 / TTL
C2 — HD-BNC/DIN CXP
Board Status
S1
L3
CXP Status Indicator
C3 — HD-BNC/DIN CXP
L4
CXP Status Indicator
C4 — HD-BNC/DIN CXP
L1
CXP Status Indicator
CXP
SerDes
Control Lane
1
C1 — HD-BNC/DIN CXP
Data Lane
1
1
Data / Control Lane
(coaxial cable)
CXP
SerDes
Control Lane
1
Data Lane
1
1
Data / Control Lane
(coaxial cable)
CXP
SerDes
Control Lane
1
Data Lane
1
1
Data / Control Lane
(coaxial cable)
CXP
SerDes
Control Lane
1
Data Lane
1
1
Data / Control Lane
(coaxial cable)
12V
500mA/reset
12 V Power Out
Power Gnd
5V
5 V Power Out
reset
Figure 16: Xtium2-CXP PX8 Block Diagram