COPYRIGHT © 2001 CANON INC. CANON CLC1000/1000S/3100 REV.2 MAY 2001 PRINTED IN JAPAN (IMPRIME AU JAPON)
A-51
APPENDIX
E. READER CONTROLLER CIRCUIT DIAGRAM
Reader Controller Circuit Diagram (1/15)
A
V55
V55
P67
P66
P65
P64
P63
P62
P61
P60
P57
P56
P55
P54
P53/FT
OB2
P52/FT
O
A
2
P51/FT
OB1
P50/FT
O
A
1
VSS
P47/FTCI2
P46/FTI2
P45/FTCI1
P44/FTI1
P43/TMO
P42/TMAI P41/TMCI
ADTRG*/P40
J1309
J1309
J1310
J1310
H8 CPU
+5v
+5v
A8
A9
A40
B39
B40
A4
A5
A5
A7
A10
A12
A18
A28
A31
A36
B2
B15
B20
B25
B12
RST*
A13
B13
A14
B14
A15
A16
B16
A17
B17
B18
A19
B19
A20
A21
B21
A22
B22
A23
B23
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
A24
B24
A25
A26
B26
A27
B27
B28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
84
83
82
81
80
79
78
77
76
75
74
73
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
B23
A23
A22
A21
B20
A20
B29
A32
B31
A26
A25
B24
B25
B26
B19
A19
B18
A18
A17
B16
A16
B15
A15
B14
A14
A13
B12
A12
B11
A11
B10
B9
A9
B8
A8
A7
112
111
110
109
108
107
106
105
104
103
102
101
B11
A11
B10
B9
B8
B7
B6
B5
B4
B3
A3
A2
100
99
98
B34
A34
97
B1
A1
96
95
94
93
92
91
B33
A33
A31
A30
90
89
88
B28
B27
87
86
85
RES*
STBY*
MMI
VSS
00/P10
01/P11
02/P12
03/P13
04/P14
05/P15
06/P16
07/P17
08
09
010
011
012
013
014
015
VSS
A0
A1
A2
A3
A4
A5
A6
A7
M02
M01
M00
VCC
RFBH*
LNR*
HNR*
RO*
AS*
E
Q/
VSS
XT AL
EXT AL
VSS
P87/TX02
P86/RX02
P85/TX01
P84/RX01
PB3/SCK2/IAQ3*
PB2/SCK1/IAQ2*
PB1/IIR01*
PB0/IIR00*
VCC
AVCC
P73/AN3
P72/AN2
P71/AN1
P70/AN0
A8
A9
A10
A11
A12
A13
A14
A15
VSS
A16/P20
A17/P21
A18/P22
A19/P23
A20/P24
A21/P25
A22/P26
A23/P27
VSS
MAIT*/P30
BACK*/P31
BREQ*/P32
P33
P34
P35
P36
P37
VCC
29
30
31
32
33
34
35
36
8
9
10
11
12
13
14
15
37
38
39
40
41
42
43
44
45
16
17
18
19
20
21
22
23
46
47
48
49
50
51
52
53
54
55
56
A29
B29
A30
B30
B31
A32
B32
A33
B33
A34
B34
A35
B35
B36
A37
B37
A38
B38
A39
A1
B1
A2
B2
B3
A4
B4
A5
B5
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
+5v
C1332
RA1319
B21
B22
J1310
+5v
J1309
J1309
D<
15..0
>
16
24
A<
23..0
>
H8WAIT*
C1331
RA1322
+5v
J1310
OM-PULSE
HSYNC*
RA1323
+5v
+5v
RA1324
RA1321
+5v
RA1320
MLT-INT*
P ASCAL-INT*
ZI-ITOP
BCRXD
SRXD
STXD
C1333
C1335
CPUCLK
H8AS*
H8RD*
H8HWR*
H8REF*
+5v
J1309
J1309
X1302
CP1302
CP1303
CP1301
CP1304
+5v
A3
A10
A24
A29
B7
A5
A6
A27
A28
B13
B17
B30
B32
1
Ct
RESET
Ck
GNQ
RESET*
Vs
Vre*
VCC
1
2
1
2
1
1
2
1
2
2
3
4
8
9
HC08
HC240
HC240
HC240
84
1
5
51
4
8
1
2
10
7
6
5
ZO-W
A
TCHDOG
C1305
R1355
Q1361
R1360
RSTB*
R1359
Q1326
Q1326
Q1326
Q1326
RST
RST*
+5v
+5v
Q1314
H8/510
HD6415018F
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