COPYRIGHT © 2001 CANON INC. CANON CLC1000/1000S/3100 REV.2 MAY 2001 PRINTED IN JAPAN (IMPRIME AU JAPON)
A-17
APPENDIX
DC Controller Circuit Diagram (3/36)
G*
G*
1
VEN
VEND0
VEND1
VEND2
VEND3
VSS
ADCLK
NC
OEMK
VLE0
VENI0
VDO
VENI1
VENI2
VENI3
HCLR0
VSS
CLKC
NC
TRG
F
AIR
F
AIT
F
AI1
F
AI2
HV
ADI
NC
CLKAB
VSS
CLKA4
NC
FBADI
CLMP
VDO
DIR0
LEN
ASELI
NC
CLKA2
VSS
VCLK
NC
VLDI
HENI
HLDI
1
2
0
1
2
15
14
13
12
10
9
8
7
11
1
5
1
4
1
3
1
2
1
1
1
0
98
7654
3210
654321
3
7
0
1
2
3
4
5
6
7
6
5
3
2
1
0
4
7
6
5
4
3
2
1
0
2
3
0
1
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
VDB7
VDB6
VDB5
VDB4
NDIR0
VSS
VCR1I
TCLA
VDB3
VDB2
VDB1
VDO
VDB0
HCLRI
NC
VCR2I
VSS
CLKB
NC
WRMK
VSL1I
VSL2I
INSLI
HVSL0
NDIRI
NC
CLKA
VSS
VSL10
VSL20
VDSLI
HVSLI
VDO
VD
A7
VD
A6
VD
A5
VD
A4
VCR10
VSS
VCR20
VD
A3
VD
A2
VD
A1
VD
A0
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
HCLR
CLKB
VCLK
CLKA
HVSEL
100
99
98
97
96
95
94
93
92
91
90
89
NC
RMA0
RMA1
RMA2
RMA3
VSS
RMA4
RMA5
RMA6
RMA7
NC
VDO
RMA8
RMA9
RMA10
RMA11
VSS
RMA12
RMA13
RMA14
RMWRH
RMWRL
NC
RMD0
RMD1
RMD2
RMD3
VSS
RMD4
RMD5
RMD6
RMD7
VDO
NC
RMD8
RMD9
RMD10
RMD11
VSS
RMD12
RMD13
RMD14
RMD15
RMCE
45
46
0
14
12
7
6
5
4
3
2
1
0
8
9
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VCC
WE*
A13
A8
A9
A11
DE*
A10
CS*
I/O7
I/O6
I/O5
I/O4
I/O3
13
8
9
11
10
15
14
13
12
11
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
MRWRL
MRWRH
MRRD
CS0
CS1
VSS
AB14
AB13
AB12
AB11
AB10
VDO
AB9
AB8
AB7
AB6
VSS
AB5
AB4
AB3
AB2
AB1
AB0
DB15
DB14
DB13
DB12
VSS
DB11
DB10
DB9
DB8
VDO
PNCS
DB7
DB6
DB5
DB4
VSS
DB3
DB2
DB1
DB0
TEST
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
Q2279
HC240
Y4
A4
Y3
A3
Y2
A2
Y1
A1
18
2
0
RGCS1*
RGCS0*
DB
US<15.,0>
AB
US<23.,0>
MRD*
T
OMHWR*
T
OML
WR*
HVSEL
1
2
3
16
4
14
6
12
1
8
Q2282
LS244
A4
Y4
A3
Y3
A2
Y2
A1
Y1
21
8
41
6
61
4
8
0
1
2
3
1
12
MrdlK
HCLR
HVSEL
VCLK
2
4
6
8
10
12
14
16
19
21
23
25
27
29
31
33
17
34
NC
NC
1
2
R2391
LED2204
1
2
R2392
LED2203
1
2
R2393
LED2202
1
2
R2394
LED2201
+5V
+5V
+5V
+5V
Q2280
Q2308
Q2283
55
6
2
3
AK
OUT
D
PR
LS74
CLR
Q
Q*
CK
4
C2254
C2272
14
12
7
6
5
4
3
2
1
0
0
1
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VCC
WE*
A13
A8
A9
A11
DE*
A10
CS*
I/O7
I/O6
I/O5
I/O4
I/O3
13
8
9
11
10
7
6
5
4
3
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
+5V
Q2309
C2271
15
16
8
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
6
+5V
13
Q2280
9
8
12
10
11
D
PR
LS74
CLR
Q
Q*
CK
+5V
13
Q2269
9
8
12
10
11
D
PR
LS74
CLR
Q
Q*
CK
1
Q2269
5
6
2
MHWR*
ML
WR*
CPUCLK
4
3
D
PR
LS74
CLR
Q
Q*
CK
+5V
+5V
13
8
4
Q2425
X2201
9
8
12
10
11
5
1
D
PR F74
CLR
Q
Q*
CK
GND
VCC
OUT
NC
1
Q2425
5
6
2
4
3
D
PR F74
CLR
Q
Q*
CK
CK
Q2270
6
5
4
LS32
Q2270
3
T
OMHWR*
T
OML
WR*
2
1
LS32
Q2270
8
10
9
LS32
Q2270
11
13
12
LS32
Q2422
Q2282
LS244
G*
A4
Y4
A3
Y3
A2
Y2
A1
Y1
11
9
13
7
15
5
17
19
19
3
18
20
22
24
RRB_F
AI1
RRB_F
AI2
RRB_F
AIR
RRB_F
AIT
26
RRB_CLMP
+5V
+5V
RA2232
RA2337
2
3
4
5
1
Q2421
LS244
G*
Y4
A4
Y3
A3
Y2
A2
Y1
A1
91
1
71
3
51
5
3
19
17
9
11
13
15
RRB_DT4
RRB_DT5
RRB_DT6
RRB_DT7
Q2421
Q2424
CP2248
LS244
G*
Y4
A4
Y3
A3
Y2
A2
Y1
A1
OUTPUT
CONTR
OL
80
80
70
70
60
60
50
50
40
40
30
30
20
20
10
3
4
7
8
13
14
17
18
11
2
1
3
4
5
6
7
8
9
10
2
5
6
9
12
15
16
19
18
2
16
4
14
6
12
1
8
1
3
5
7
RRB_DT0
RRB_DT1
RRB_DT2
BRR_DT3
J2204
LS244
7
13
R2822
Q2282
19
28
RRB_ADCLK
+5V
LS244
9
11
R2821
0
1
2
3
4
0
1
2
3
4
4
5
5
6
7
+5V
CK
Q2442
Q2282
LS244
G*
A4
Y4
A3
Y3
A2
Y2
A1
Y1
21
8
41
6
61
4
8
19
19
12
17
19
21
23
RRF_F
AI1
RRF_F
AI2
RRF_F
AIR
RRF_F
AIT
25
RRF_CLMP
+5V
+5V
RA2233
2
3
4
5
1
Q2442
LS244
G*
Y4
A4
Y3
A3
Y2
A2
Y1
A1
91
1
71
3
51
5
3
1
1
17
9
11
13
15
RRF_DT4
RRF_DT5
RRF_DT6
RRF_DT7
Q2442
Q2428
CP2267
CP2232
LS244
G*
Y4
A4
Y3
A3
Y2
A2
Y1
A1
LS374
OUTPUT
CONTR
OL
80
80
70
70
60
60
50
50
40
40
30
30
20
20
10
3
4
7
8
13
14
17
18
11
2
RegOutEn*
1
3
4
2
1
3
4
5
6
5
6
7
8
9
10
10
2
5
6
9
12
15
16
19
18
2
16
4
14
6
12
1
8
1
3
5
7
RRF_DT0
RRF_DT1
RRF_DT2
RRF_DT3
J2203
LS244
3
17
R2824
Q2282
19
27
29
31
RRF_ADCLK
RR_LMPCNT
30
32
RR_LMPCNT
+5V
LS244
5
RegOutEn*
15
R2823
R2579
Q2310
CP2234
1
2
3
CLKA
AK
OUT
CP2233
CP2249
CLKB
RegLed
LS240
9
11
19
1
Q2401
8
4
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Страница 840: ...0501GR PRINTED IN JAPAN IMPRIME AU JAPON This publication is printed on 100 reprocessed paper ...