BIOS
7-9
PCI Parity Error Forwarding
The feature allows SERR and PERR errors detected in PCI slots to be sent (forwarded) to the
BIOS DMI Event Log for the user to review. The options are Enabled and
Disabled.
ROM Scan Ordering
This feature allows the user to decide which Option ROM to be activated
fi
rst. The options
are
Onboard
fi
rst
and Add-On
fi
rst.
Reset Con
fi
guration Data
If set to Yes, this setting clears the Extended System Con
fi
guration Data- (ESCD) area. The
options are Yes and
No
.
Slot1 PCI-Exp x8
Access the submenu for each of the settings above to make changes to the following:
Option ROM Scan
When enabled, this setting will initialize the device expansion ROM. The options are
Enabled
and Disabled.
Enable Master
This setting allows you to enable the selected device as the PCI bus master. The
options are
Enabled
and Disabled.
Latency Timer
This setting allows you to set the clock rate for Bus Master. A high-priority, high-
throughout device may bene
fi
t from a greater clock rate. The options are
Default
,
0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix, Novell and
other Operating Systems, please select the option: other. If a drive fails after the
installation of a new software, you might want to change this setting and try again.
A different OS requires a different Bus Master clock rate.
Large Disk Access Mode
This setting determines how large a hard drive is to be accessed. The options are
DOS
or
Other (for Unix, Novelle NetWare and other operating systems).
Advanced Chipset Control
Access the submenu to make changes to the following settings.
WARNING
:
Use caution when changing the Advanced settings. Incorrect values entered may cause
system to malfunction. Also, a very high DRAM frequency or incorrect DRAM timing may
cause system to become unstable. When this occurs, revert the item to the default setting.
!
Содержание Novascale R422
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