FT800 Series Programmer Guide
Version 2.1
Document Reference No.: BRT_000030 Clearance No.: BRT#037
34
Copyright © Bridgetek Limited
Register Definition 4
REG_SWIZZLE Definition
31
4 3
0
Address: 0x102460
Reset Value: 0x0
Note: NONE
Bit 0 - 3 : These bits are set to control the arrangement of output RGB pins,
which may help support different LCD panel. Please check the table above for
details.
Reserved
R/W
REG_SWIZZLE Definition
Table 2 REG_SWIZZLE and RGB pins mapping table
REG_SWIZZLE
PINS
b3 b2 b1 b0 R7, R6, R5,
R4, R3, R2
G7, G6, G5,
G4, G3, G2
B7, B6, B5, B4,
B3, B2
0
X
0
0
R[7:2]
G[7:2]
B[7:2]
Power on Default
0
X
0
1
R[2:7]
G[2:7]
B[2:7]
0
X
1
0
B[7:2]
G[7:2]
R[7:2]
0
X
1
1
B[2:7]
G[2:7]
R[2:7]
1
0
0
0
G[7:2]
B[7:2]
R[7:2]
1
0
0
1
G[2:7]
B[2:7]
R[2:7]
1
0
1
0
G[7:2]
R[7:2]
B[7:2]
1
0
1
1
G[2:7]
R[2:7]
B[2:7]
1
1
0
0
B[7:2]
R[7:2]
G[7:2]
1
1
0
1
B[2:7]
R[2:7]
G[2:7]
1
1
1
0
R[7:2]
B[7:2]
G[7:2]
1
1
1
1
R[2:7]
B[2:7]
G[2:7]