AXIOMTEK STX88810VEA, Руководство пользователя

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STX88810 STX Evaluation Platform Module Series User’s Manual
Ultra DMA/66/100 Reference
65
following table is based on all commands are either a cache hit (data
comes from the buffer and has <1 ms latency), or a cache miss (data
comes from the media and has >10 ms latency.)
Ultra ATA/66 Performance Benefit
Cache Miss Cache Hit
Sequential
Yes Yes
Random
No Yes
Backward Compatibility
The Ultra ATA/100 protocol and commands are designed to be
compatible with existing ATA devices and systems. Drives
implementing Ultra ATA/100 are fully backward compatible with older
ATA modes, including Ultra ATA/33/66. It will handle all the data
transfer modes. The slower modes will be supported with a different
clock signal and clock divider. The slower modes previously worked
with a standard 40-pin interface cable, but Ultra ATA/66/100 requires a
40-pin 80-conductor cable for modes 3 and 4.
Data Transfer Rate
(max.)
Cable Conductors CRC
DMA Mode1
11.1 MB/s 40-pin IDE 40-pin No
Multi-word DMA
Mode 1
13.3 MB/s 40-pin IDE 40-pin No
Multi-word DMA
Mode 2
16.6 MB/s 40-pin IDE 40-pin No
Ultra ATA Mode 2 33.3 MB/s 40-pin IDE 40-pin Yes
Ultra ATA Mode 4
66.6 MB/s 40-pin IDE 80-pin Yes
Ultra ATA Mode 5
99.9 MB/s 40-pin IDE 80-pin Yes