AXIOMTEK DASP-52282, Руководство пользователя

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DASP-52282 Card User’s Manual
Registry Structure and Format
40
4.2.4 Command Output Latch Register
Write (Base A Offset 0x02-03)
D7 D6 D5 D4 D3 D2 D1 D0
MUX3 MUX2 MUX1 MUX0 HDSK
Mode2 Mode1 Mode0
D15 D14 D13 D12 D11 D10 D9 D8
DevID X X
CMDOK
Ref1 Ref0 Gain1 Gain0
Command Output Latch Register is used to set the A/D operation.
User must write high byte (bit8 - bit15) first. The format is
described as bellows.
X : Don’t care bits.
Mode0-2, HDSK: A/D Operation Mode Selection
Description HDSK Mode2 Mode1 Mode0
Polling Mode 0 0 0 0
Internal Pacer Mode 0 0 0 1
Interrupt Mode 0 0 1 0
External Pre-Trigger Mode 0 0 1 1
External Post Trigger Mode 0 1 0 1
External Middle Trigger Mode 0 1 1 1
Reversed 1 X X X
MUX0-3: A/D Multiplex Selection
A/D Input Channel Selection = MUX0~MUX3;
MUX3 = MSB, MUX0 = LSB
Single-Ended Mode = MUX0-MUX3 (Channel
0-15)
Differential Mode = MUX0-MUX2 (Channel 0-7)