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DASP-52282 Card User’s Manual

Theorem of Operation

Input

Range

+Full Scale

Zero

-Full

Scale

Data

Resolution

+9.99512

00.000

-10.000 0.00488V

10V

0xFFF/4095 0x800/2048 0x0/0 1LSB

+4.99756

00.000

-5.000 0.00244V

0xFFF/4095 0x800/2048 0x0/0 1LSB

+0.499756

00.000

-0.5 0.000244V

0.5V

0xFFF/4095 0x800/2048 0x0/0 1LSB

+0.0499756

00.000

-0.05 0.0000244V

0.05V

0xFFF/4095 0x800/2048 0x0/0 1LSB

+0.00499756

00.000

-0.005 0.00000244V

0.005

0xFFF/4095 0x800/2048 0x0/0 1LSB

Input Range, Data/Code and Resolution of DASP-52282H /

DASP-52282HL – Bipolar Input

Input

Range

+Full Scale

Zero

-Full

Scale

Display

Resolution

+9.99756

00.000

*** 0.00244V

0~10V

0xFFF/4095 0x0/0

*** 1LSB

+0.999756

00.000

*** 0.000244V

0~1V

0xFFF/4095 0x0/0

*** 1LSB

+0.0999756

00.000

*** 0.0000244V

0~0.1V

0xFFF/4095 0x0/0

*** 1LSB

+0.00999756

00.000

*** 0.0000244V

0~0.01V

0xFFF/4095 0x0/0

*** 1LSB

Input Range, Data/Code and Resolution of DASP-52282H /

DASP-52282HL – Uni-Polar Input

Содержание DASP-52282

Страница 1: ...DASP 52282 12 bit 330KHz Multifunction w Free Running Card User s Manual...

Страница 2: ...xiomtek makes no commitment to update or to keep current the information contained in this manual Axiomtek reserves the right to make improvements to this document and or product at any time and witho...

Страница 3: ...ity on your body Wear a wrist grounding strap available from most electronic component stores when handling boards and components Trademarks Acknowledgments AXIOMTEK is a trademark of Axiomtek Co Ltd...

Страница 4: ...ion JP1 16 2 4 A D D A and DI DO Circuits and Wiring 17 2 5 Quick setup and test 19 Chapter 3 Theorem of Operation 25 3 1 Overview of DASP 52282 System Architecture and Operation 25 3 2 Acquisition Mo...

Страница 5: ...mer Counter Control Words Register 44 4 2 11 Clear FIFO Content Register 45 4 2 12 Clear Flag Register 45 4 2 13 Enable DAC1 and DAC2 Output Register 45 4 2 14 A D ADC Software Polling Control Registe...

Страница 6: ...vi This page does not contain any information...

Страница 7: ...ications Advanced S W Mechanism Free running Free running is a brand new data retrieving mechanism to mainly save software SW RD 30 50 of the time and effort in developing application programs It help...

Страница 8: ...tem and can show users all system resources such as serial numbers IRQ and I O addresses This lets users clearly see through and immediately know whether all DASPs are working normally decreasing the...

Страница 9: ...ain 0 5 1 2 4 8 Unipolar N A 0 10V 0 v 0 2 5v 0 1 25v Bipolar 10V 5v 2 5v 1 25v 0 625v High Gain DASP 52282H DASP 52282HL Gain 0 5 1 10 100 1000 Unipolar N A 0 10V 0 1V 0 0 1V 0 0 01V Bipolar 10V 5v 0...

Страница 10: ...trigger mode DC Accuracy INL 1 LSB gain 0 5 DNL 1LSB gain 0 5 AC Accuracy SNR 71dB gain 0 5 Automatic Scan Mechanism Digital to Analog Converter D A only DASP 52282 DASP 52282H Channels 2 independent...

Страница 11: ...ms Wiring Cable CB 89037 2 37 pin female D sub type cable with 2m length CB 89037 5 37 pin female D sub type cable with 5m length The shielded D sub cable with 2m and 5m are designed for the DASP 5228...

Страница 12: ...D O connector of the DASP 52282 Daughter Board DB 87822 16 isolated D I daughter board The board contains 16 channels isolated digital input which is designed for TTL level digital input signal to th...

Страница 13: ...t e r 2 Hardware Installation 2 1 Board Layout CON4 JP1 CON1 CON2 CON3 1 3 5 2 4 6 1 3 5 2 4 6 2 4 6 8 1 3 5 7 JP9 JP8 VR2 VR3 VR1 VR5 VR6 VR7 VR10 VR8 VR9 JP4 1 2 1 2 19 20 19 20 1 2 3 JP7 10 9 2 1...

Страница 14: ...e terminal block TB 88320 with the flat cable CB 89320 2 or CB 89320 5 CON2 The I O connector CON2 on the DASP 52282 is a 20 pin flat connector for digital output signals CON2 enables you to connect t...

Страница 15: ...DASP 52282 Card User s Manual Hardware Installation 9 2 2 2 Digital Input Connector CON1 CON1 CB 89320 DB 87822 CON1 CB 89320 TB 88320 DI Signal Connections for DASP 52282...

Страница 16: ...1 TTL 3 Digital Input 2 TTL 4 Digital Input 3 TTL 5 Digital Input 4 TTL 6 Digital Input 5 TTL 7 Digital Input 6 TTL 8 Digital Input 7 TTL 9 Digital Input 8 TTL 10 Digital Input 9 TTL 11 Digital Input...

Страница 17: ...DASP 52282 Card User s Manual Hardware Installation 11 2 2 3 Digital Output Connector CON2 CON2 CB 89320 DB 87825 CON2 CB 89320 TB 88320 DO Signal Connections for DASP 52282...

Страница 18: ...3 Digital Output 2 TTL 4 Digital Output 3 TTL 5 Digital Output 4 TTL 6 Digital Output 5 TTL 7 Digital Output 6 TTL 8 Digital Output 7 TTL 9 Digital Output 8 TTL 10 Digital Output 9 TTL 11 Digital Outp...

Страница 19: ...d User s Manual Hardware Installation 13 2 2 4 A D D A and Timer Counter Connector CON4 CON4 A D D A and Timer Counter Connector Pin Assignment CON4 CB 89037 CB 89037 TB 88037 AIO Signal Connections f...

Страница 20: ...alog Input 4 24 Analog Input 12 6 Analog Input 5 25 Analog Input 13 7 Analog Input 6 26 Analog Input 14 8 Analog Input 7 27 Analog Input 15 9 Analog Ground 28 Analog Ground 10 Analog Ground 29 Analog...

Страница 21: ...nput 3 23 Analog Input 3 5 Analog Input 4 24 Analog Input 4 6 Analog Input 5 25 Analog Input 5 7 Analog Input 6 26 Analog Input 6 8 Analog Input 7 27 Analog Input 7 9 Analog Ground 28 Analog Ground 10...

Страница 22: ...T0 JP4 3 5 5 6 5 7 General Purpose Timer Counter 8254 Counter0 Jumper External Clock OSC clock 8MHz JP4 1 2 2 4 2 3 2 DAC1 DAC2 Output Range Selection JP8 and JP9 DAC Channel Jumper Output 0V 10V Outp...

Страница 23: ...tial and single end input digital input and digital output wirings are depicted as follows respectively Multiplexer PGA ADC FIFO Channl Selection Input Range Selection AD Ch 0 Ch 16 Ch 0 Ch 8 Analog I...

Страница 24: ...on 18 MUX PGA ADC GND VIn Is R R 125ohms Analog Input Wiring Diagram for DASP 52282 Current Input GND DI MCU 5V TTL Device GND GND 5V Digital Input Wiring Diagram for DASP 5228 GND DO0 GND 5V TTL Devi...

Страница 25: ...CI devices Do not share the same IRQ of DASP 52282 with other devices The DASP 52282 is a plug and play device for MS Windows and the OS will detect your DASP 52282 after you power on the PC The detai...

Страница 26: ...DASP 52282 Card User s Manual Hardware Installation 20 Exit the PCI Configuration Utility and launch the ToolWorkShop for DASP 52282 As shown in following Launch ToolWorkShop Select board test...

Страница 27: ...DASP 52282 Card User s Manual Hardware Installation 21 Perform AD DA and DIO test of DASP 52282 as shown in following Select Test Target DASP 52282...

Страница 28: ...nual Hardware Installation 22 Check Device Information Setup AO Range and Press Setup Button to Load DASP 52282 Library Perform Analog Output Test by Set the DA Value and Measure the Output Signal of...

Страница 29: ...t Value and Read Back the DI Port Value DIO Wiring Refer to Section 2 4 Perform the Analog Input Test of DASP 52282 A Reference Analog Input Signal can be Connected to AI Pins of Terminal Box of DASP...

Страница 30: ...DASP 52282 Card User s Manual Hardware Installation 24 This page does not contain any information...

Страница 31: ...verview of DASP 52282 System Architecture and Operation The system block diagram of DASP 52282 is depicted as in following figure A PCI interface to host is constructed with a PCI bridge and a 33MHz b...

Страница 32: ...to perform a polling operation write BASE 0x16 and ADC will convert one time When AD conversion finish Pready BASE 0x02 Bit3 will be high 3 2 2 Pacer Mode Benefited by the double buffering mechanism a...

Страница 33: ...d data counted by hardware logic circuit the gate control logic of AD conversion of DASP 52282 is emulates With pre trigger mode operation DASP 52282 acquires and keeps the user specified amount of da...

Страница 34: ...ode N External Trigger Signal Convert Start Convert Stop User Stop Post Trigger Mode Analog Signal Convert Counter N Principle of External Post Trigger Operation of DASP 52282 Middle Trigger Mode For...

Страница 35: ...d External Trigger Timer Counter 2 Middle Trigger Counter Pacer Tick Functional Block Diagram of Middle Trigger of DASP 52282 N1 External Trigger Signal Convert Start Convert Stop User Start Middle Tr...

Страница 36: ...used to launch batch data transfer mechanism of ring 0 driver of DASP 52282 The following shows the functional block diagram of massive data transfer of DASP 52282 ADC Analog Input Digital Output FIFO...

Страница 37: ...tion 31 0 ADC 0 1 N N 1 ADC N 3 ADC 0 1 2 N 1 N 2 N X N X 1 ADC 0 1 2 N 2 N 3 N X 2 N 4 N 2 1 IRQ PCI Bus HF Notification On board FIFO software buffer host computer DASP 52282 Principle of HF Interru...

Страница 38: ...g 3 API 3 4 Automatic Scan To perform high speed multi channel data acquisition or automatic scan an on board micro controller is used to manipulate the input multiplexer and the PGA programmable gain...

Страница 39: ...ts the linear mapping of AD code of DASP 52282 and the analog input signal FS denotes the full span of analog input under the user configured analog input range The mapping of analog input to ADC code...

Страница 40: ...V 1 25V 0xFFF 4095 0x800 2048 0x0 0 1LSB 0 624695 00 000 0 625 0 000305 0 625V 0xFFF 4095 0x800 2048 0x0 0 1LSB Input Range Data Code and Resolution of DASP 52282 DASP 52282L Bipolar Input Input Range...

Страница 41: ...0xFFF 4095 0x800 2048 0x0 0 1LSB 0 00499756 00 000 0 005 0 00000244V 0 005 V 0xFFF 4095 0x800 2048 0x0 0 1LSB Input Range Data Code and Resolution of DASP 52282H DASP 52282HL Bipolar Input Input Rang...

Страница 42: ...DASP 52282 Card User s Manual Theorem of Operation 36 This page does not contain any information...

Страница 43: ...nd Register Low Byte BASE 0x03 Status Register High Byte Command Register High Byte BASE 0x04 A D Data Register Low Byte D A Channel 1 Low Byte BASE 0x05 A D Data Register High Byte D A Channel 1 High...

Страница 44: ...tal Input High Byte D8 D15 4 2 2 Digital Output Latch Register Write Base Address Offset 0x00 01 D7 D6 D5 D4 D3 D2 D1 D0 Digital Output Low Byte D0 D7 D15 D14 D13 D12 D11 D10 D9 D8 Digital Output High...

Страница 45: ...e Bit 4 1 External Trigger is active MidEnd Bit 5 1 End of External Middle Trigger Diff S E Bit 6 1 Single Ended Bit 6 0 Differential EnDAC Bit 7 0 Enable DAC1 and DAC2 output CMDOK Bit 8 1 PIC receiv...

Страница 46: ...er must write high byte bit8 bit15 first The format is described as bellows X Don t care bits Mode0 2 HDSK A D Operation Mode Selection Description HDSK Mode2 Mode1 Mode0 Polling Mode 0 0 0 0 Internal...

Страница 47: ...h2 0 0 1 0 Ch3 0 0 1 1 Ch4 0 1 0 0 Ch5 0 1 0 1 Ch6 0 1 1 0 Ch7 0 1 1 1 Ch8 1 0 0 0 Ch9 1 0 0 1 Ch10 1 0 1 0 Ch11 1 0 1 1 Ch12 1 1 0 0 Ch13 1 1 0 1 Ch14 1 1 1 0 Ch15 1 1 1 1 Differential mode channel s...

Страница 48: ...s Manual Registry Structure and Format 42 Gain0 1 A D Gain Control PGA205 or PGA206 A D GAIN Gain0 Gain1 1x 0 0 2x 0 1 3x 1 0 4x 1 1 Ref0 1 A D Reference Control Instrumentation Gain Ref0 1x 0 0 5x 1...

Страница 49: ...D8 Reserved AD Data D0 D11 4 2 6 DAC Channel 1 Output Latch Register Write Base Address Offset 0x04 05 D7 D6 D5 D4 D3 D2 D1 D0 DA Data to Channel 1 D0 D11 D15 D14 D13 D12 D11 D10 D9 D8 Reserved DA Dat...

Страница 50: ...D0 D11 4 2 9 8254 Timer Counter Register Read Write Base Address Offset 0x08 0C D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 8254 Counter 0 1 and 2 Please refer to Intel s Micro system Compo...

Страница 51: ...D14 D13 D12 D11 D10 D9 D8 Reserved 4 2 12 Clear Flag Register Write Base Address Offset 0x12 D7 D6 D5 D4 D3 D2 D1 D0 Write Any Value to Reset the System Status to Initial State D15 D14 D13 D12 D11 D1...

Страница 52: ...ved Write this register to any value to generate a Conversion Signal and the PReady Bit Status Register Bit 3 will be set to TRUE 4 2 15 Enable ADC Register Write Base Address Offset 0x18 D7 D6 D5 D4...

Страница 53: ...gly recommended to warm up the computer 30 minute before performing calibration Locations of individual VR are shown in Chapter 2 The corresponding VR s function is depicted as below VR Number Descrip...

Страница 54: ...d VR7 until DAC1 and DAC2 output voltage to 0V with 1 LSB tolerance respectively Set DAC1 and DAC2 output voltage to 10V adjust VR9 and VR10 until DAC1 and DAC2 output voltage to 10V with 1 LSB tolera...

Страница 55: ...0 0 0 1 x Bipolar 5V 10V 0 0 0 1 1 2 x Bipolar 2 5V 5V 0 0 1 0 2 4 x Bipolar 1 25V 2 5V 0 0 1 1 3 8 x Bipolar 0 625V 1 25V 0 1 0 0 4 0 5 x Bipolar 10V 20V 1 0 0 0 8 1 x Unipolar 0 10V 10V 1 0 0 1 9 2...

Страница 56: ...DASP 52282 Card User s Manual Analog Input Gain Mode Configuration 50 This page does not contain any information...

Страница 57: ...DASP 52282 Card User s Manual Dimension of DASP 52282 and Accessories 51 A p p e n d i x B Dimension of DASP 52282 and Accessories DASP 52282 TB 88037 112 77 52...

Страница 58: ...DASP 52282 Card User s Manual Dimension of DASP 52282 and Accessories 52 TB 88320 67 77 52 DB 87822...

Страница 59: ...DASP 52282 Card User s Manual Dimension of DASP 52282 and Accessories 53 DB 87825...

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