AXIOMTEK DASP-52282, Руководство пользователя

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DASP-52282 Card User’s Manual
Registry Structure and Format
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C h a p t e r 4
Register Structure and Format
4.1 Overview
The DASP-52282 board occupies 16 consecutive I/O address.
The address of each register is defined as the board’s base
address plus an offset. The I/O registers and their corresponding
functions are listed in the followings.
Address Read Function Write Function
BASE+0x00 Digital Input (Low Byte) Digital Output (Low Byte)
BASE+0x01 Digital Input (High Byte) Digital Output (High Byte)
BASE+0x02 Status Register (Low Byte) Command Register (Low Byte)
BASE+0x03 Status Register (High Byte) Command Register (High Byte)
BASE+0x04 A/D Data Register (Low Byte) D/A Channel 1 (Low Byte)
BASE+0x05 A/D Data Register (High Byte) D/A Channel 1 (High Byte)
BASE+0x06 A/D FIFO Register (Low Byte) D/A Channel 2 (Low Byte)
BASE+0x07 A/D FIFO Register (High Byte) D/A Channel 2 (High Byte)
BASE+0x08 Read 8254 Counter 0 Load 8254 Counter 0
BASE+0x0A Read 8254 Counter 1 Load 8254 Counter 1
BASE+0x0C Read 8254 Counter 2 Load 8254 Counter 2
BASE+0x0E Not Used 8254 Counter Control Words
BASE+0x10 Not Used Clear FIFO Content
BASE+0x12 Not Used Clear Flag
BASE+0x14 Not Used Enable DAC1, DAC2 Output
BASE+0x16 Not Used ADC Software Polling
BASE+0x18 Not Used Enable ADC
BASE+0x1A Not Used Disable ADC