AXIOMTEK DASP-52282, Руководство пользователя

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Table of Contents
Chapter 1 Introduction.....................................................1
1.1 Features ...................................................................2
1.2 Specifications..........................................................3
1.3 Accessories.............................................................5
Chapter 2 Hardware Installation....................................7
2.1 Board Layout ...........................................................7
2.2 Signal Connections.................................................8
2.2.1 Signal Connection Descriptions ............................ 8
2.2.2 Digital Input Connector CON1 .............................. 9
2.2.3 Digital Output Connector CON2 ......................... 11
2.2.4 A/D, D/A and Timer/Counter Connector CON4 13
2.3 Jumper Setting ......................................................16
2.3.1 ADC Clock Source (JP4) ...................................... 16
2.3.2 DAC1, DAC2 Output Range Selection (JP8 and
JP9) ............................................................................ 16
2.3.3 A/D Single-Ended / Differential Selection (JP1) . 16
2.4 A/D, D/A and DI/DO Circuits and Wiring .............17
2.5 Quick setup and test.............................................19
Chapter 3 Theorem of Operation .................................25
3.1 Overview of DASP-52282 System Architecture
and Operation ................................................................25
3.2 Acquisition Modes of Analog Input.....................26
3.2.1 Polling Mode ......................................................... 26
3.2.2 Pacer Mode........................................................... 26
3.2.3 External Trigger Mode .......................................... 27
3.3 Double Buffering Mechanism For Fast Data
Acquisition .....................................................................30
3.3.1 On Board FIFO and FIFO Half Full Interrupt ......... 30
3.3.2 Circular Buffer for Massive Data Buffering .......... 32
3.4 Automatic Scan.....................................................32
3.5 Analog Input Range, ADC Code and AD Value ..33
Chapter 4 Register Structure and Format ...................37
4.1 Overview ................................................................37
4.2 I/O Register Map....................................................38
4.2.1 Digital Input Buffer Register .................................. 38
4.2.2 Digital Output Latch Register ............................... 38