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SLP_S4# Assertion Width (4 to 5 Sec.)
This item selects a minimum assertion width of the SLP_S4# signal.
System BIOS Cacheable (Enabled)
This item allows the system to be cached in memory for faster execution. Enable this item for
better performance.
Video BIOS Cacheable (Disabled)
The item allows the video BIOS to be cached in memory for faster execution.
Memory Hole At 15M-16M (Disabled)
You can reserve this area of system memory for ISA adapter ROM. When this area is reserved, it
cannot be cached. The user information of peripherals that need to use this area of system memory
usually discusses their memory requirements. The default value is "Disabled".
PCI Express Root Port Func (Press Enter)
Scroll to this item and press <Enter> to view the following screen:
PCI Express 1/2/3/4 (Auto)
This item allows you to enable/disable the PCI Express port. The Choices: Auto (default), Disabled.
PCI-E Compliancy Mode (v1.0a)
This item allows you to select the PCI-E Compliancy Mode. The Choices: v1.0a (default), v1.0.
Phoenix-AwardBIOS CMOS Setup Utility
PCI Express Root Port Func
Menu Level
PCI Express Port 1
[Auto]
PCI Express Port 2
[Auto]
PCI Express Port 3
[Auto]
PCI Express Port 4
[Auto]
PCI-E Compliancy mode [v1.0a]
Item Help
: Move Enter: Select
F10: Save
ESC: Exit
F1: General Help
F5: Previous Values
F6: Fail-Safe Defaults
F7: Optimized Defaults
+/-/PU/PD: Value
Press <Esc> to return to the Advanced Chipset Features page.
Содержание AP-3500
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