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44409
Rev.
1.70
October 10
AMD SP5100 Databook
Functional Description
59
SP5100 has a strapping option for loading the boot codes from the PCI bus on the very first boot (1
st
boot
after RSMRST#). Subsequent boots will revert back to the ROM selection determined by the ROM straps
or PMIO programming. This is to allow system manufacturers to populate the motherboard with a blank
flash device (for BIOS) and use this option to program it. This is particularly useful for systems built
without a socket for the BIOS ROM.
8.9
High Definition Audio
Intel® High Definition (HD) Audio is the next-generation PC audio technology intended for replacing the
AC ’97. The primary goal for developing HD Audio is to create a uniform programming interface and to
provide capabilities beyond those supported by the AC ‘97. It is not intended to be backward compatible
with the AC ’97. The link protocols and operations of these two standards are not compatible, which
means AC ‘97 and HD Audio codecs cannot be mixed on the same link.
8.9.1 HD Audio Codec Connections
Figure 8-6 below shows the HD Audio interface connections to the HD Audio codecs. SP5100 can
support up to 4 HD Audio codecs. Each codec will have its own AZ_SDIN (data input) for the HD Audio
interface. Figure 8-6
shows the connection of a 2 codec configuration.
SB
HD Audio Engine
HD CODEC
1
HD CODEC
2
SDIN0
HDAudio SYNC/BitCLK/RST#
HD Audio SDOUT
HD Audio SDIN3
Figure 8-6: HD Audio Codec Connections
8.10 Power management/ACPI
The SP5100 power management/ACPI logic supports C3/C1e and stutter mode and S states for F series
and prior versions of CPUs. With the newer CPUs and RS78x series NB, C and P states are controlled
by the CPU and NB. Under this configuration, SP5100 becomes a client and uses ALLOW_LDTSTP as a
handshake with NB to help NB to manage the C and P states accordingly.
8.11 General Events and GPIOs
Table 8-5 below lists the SMI, SCI, and Wake Events supported by SP5100’s GPIO and GEVENT pins.