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AMD SP5100 Databook
44409 Rev. 1.70 October 10
30
Integrated Resistor and External Pull-up/Pull-down Resistor
Requirements
Interface
Signal Name
Value of
Integrated / External
Resistor
Resistor Type
Register for
programming the
integrated PU/PD
BMREQ#/REQ5#/GPIO65
Integrated 8.2 K
See
Note
PM2_Rg F0h
Default: Pull-up/Pull-
down not enabled
LLB#/GPIO66
Integrated 10 K
Pull-up
PM2_Rg F0h
Default: Pull-up
enabled
SATA_ACT#/GPIO67
Integrated 8.2 K
See
Note
PM2_Rg F0h
Default: Pull-up/Pull-
down not enabled
LDRQ1#/GNT5#/GPIO68
Integrated 15 K
Pull-up
PM2_Rg F1h
Default: Pull-up
enabled
REQ3#/GPIO70
Integrated 15 K
Pull-up
PM2_Rg F1h
Default: Pull-up
enabled
REQ4#/GPIO71
Integrated 15 K
Pull-up
PM2_Rg F1h
Default: Pull-up
enabled
GNT3#/GPIO72
Integrated 8.2 K
See
Note
PM2_rg F2h
Default: Pull-up/Pull-
down not enabled
GNT4#/GPIO73
Integrated 8.2 K
See
Note
PM2_rg F2h
Default Pull-up/Pull-
down not enabled
IMC GPIO
IMC_GPIO
Integrated 10 K
LPC PCI config
DCh:CCh.
Default: Pull-up/Pull-
down not enabled
Note:
The pin has an internal integrated pull-up or pull-down resistor that is not enabled by default. The pin’s default
function does not require a pull-up or pull-down. However, if the pin is used for an alternate function and a pull-up or
pull-down is required, the internal resistor can be enabled by the indicated register.