Allen-Bradley ControlLogix 1756-DMD30, Руководство пользователя, Страница: 83 / 369

Publication 1756-UM522B-EN-P - February 2003
1756-DMD30 Specific Information B-3
Speed Control - Reference
10 11 12
0 1 2 3 4 5 6
X
+
13 14 15
16
0
0
18 23
17 18
1 0
157
00
0
30 31
32 33
34
In
v
Logic
1 0 0 1
157
01
&
157
02
151
00
151
01
0
153
00
37
153
01
35 36
X
38
+
21
61
140
141 144 142 143
151
11
56
9
57 58
151
10
Speed Control - Ref
erence
(2 ms)
Max
X
1
40
20 21
152
0
47
46
44
180
43
62
63
42
20
Speed Ref 1
152
Limit
Ramp
S Cur
v
e
Spd Ref1 Divide
Speed Ref 2
Spd Ref2 Multi
Speed Ref 4 Speed Ref 5
Speed Ref DPI
Jog Speed 1 Jog Speed 2
Speed Ref Sel
Applied LogicCmd
Logic Ctr
l State
Control Options
Applied LogicCmd
Logic
1 0 0 1
41
Re
v Speed Limit
Fwd Speed Limit
Selected Spd Ref
Limited Spd Ref
Iner
tia Comp
n
t
Fr
iction Comp
Iner
tia SpeedRef
Iner
tiaAccelGain
Iner
tiaDecelGain
To
tal Iner
tia
Logic Command
(Iner
tia Comp)
Logic Command
(F
rict Comp)
Fr
icComp T
orqAdd
Fr
icComp Setup
Fr
icComp Stic
k
Fr
icComp Slip
Fr
icComp Rated
145
59
45
Dela
y
ed Spd Ref
Fr
icComp Spd Ref
Lead Lag
(kn * s) + wn
s + wn
Link
Link
Link
Spd Ref Bypass
Control Options
(SRef Filt En)
SpdRef Filt Gain
SpdRef Filt BW
Filtered Spd Ref
Scaled Spd Ref
Spd T
rim1
SpdRef
Speed T
rim
1
S Cur
v
e
Spd Ref
Speed Ref Scale
from Process
Control [4F2]
Link
Vir
tual Encoder
4x inter
nal
Vir
t Encoder PPR
Vir
t Encdr P
osit
Vir
t Encdr Dly
ed
Ramped Spd Ref
S Cur
v
e
Time
Accel Time
Decel Time
Logic Command
(SpdRamp Dsb
l)
Logic Command
(Spd S Cr
v En)
Logic Ctr
l State
(SRef Ramp En)
Logic Ctr
l State
(SRef SCr
v En)
Iner
tia T
o
rq
Add
(Unipol Fwd) +1
(Unipol Re
v) -1
to Speed Control - Regulator [3A2]
to T
orque
Control [8B2]
to T
orque
Control [8B1]
Dela
y
One
Scan
Dela
y
One
Scan
/
1 2 3 4 5 6
B
A
D
C
F
E
H
G
I
PI Output