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The programmable capacitance is implemented by varying the signal
level across a compensating capacitor. In the x0.2 configuration,
low frequency gain is set by R301, R302, and R304. The variable gain
element U302/U303 essentially varies the value of C306 from 0 to 1
times its value in 256 steps. The exact gain constant is determined
during the 50 kHz ac voltage range calibration procedure. In the
x0.002 configuration, low frequency gain is set by R301, R302, and
R303. The variable gain element U302/U303 essentially varies the
value of C305 plus C306 from 0 to 1 times their value in 256 steps.
The exact gain constant is determined during the 50 kHz ac voltage
range calibration procedure.
The second stage is made up of two amplifiers (U305 and U312) each
configured for a fixed gain of x10. Overall 2nd stage gains of x1, x10,
and x100 are produced by routing the 1st stage output either around,
or through one or both amplifiers as shown in the table below.
2nd Stage Gain
U306A
U306B
U306C
U306D
U304C
x1
x10
x100
ON
OFF
OFF
OFF
ON
ON
OFF
OFF
ON
OFF
ON
OFF
OFF
OFF
ON
The output of the 2nd stage is connected to the rms-to-dc converter
stage. Any residual dc offset from the amplifier stages is blocked by
capacitor C316. Buffer U307 drives the input to the rms-to-dc converter
as well as the frequency comparator (U310A) input. The rms-to-dc
converter has two selectable averaging filters (C318 and C318 plus
C321) for the analog computer circuit of U308. The two analog
averaging filters together with digital filters running in the main
CPU implement the three selectable ac filters: slow, medium, and
fast. The faster analog filter (using C318) is used for all
AC V
,
AC I
,
and frequency or period autoranging. The slower analog filter is used
only with the slow and medium ac filter choices.
In frequency or period measurements, U310A generates a logic signal
(FREQIN) for every input zero crossing. The ac sections FREQRNG
dc output is measured directly by the main CPU’s 10-bit ADC during
frequency or period measurements. This lower resolution measurement
is sufficient to perform voltage ranging decisions for these functions.
The frequency comparator output is disabled during ac voltage and
current measurements by U310B forcing U310A’s input to –15 volts.
5
Chapter 5 Theory of Operation
Internal DMM
135
Содержание 34970A
Страница 1: ...Agilent 34970A Data Acquisition Switch Unit Service Guide ...
Страница 34: ...32 ...
Страница 35: ...2 Quick Start 2 ...
Страница 49: ...3 Front Panel Overview 3 ...
Страница 62: ...60 ...
Страница 63: ...4 Calibration Procedures 4 ...
Страница 118: ...116 ...
Страница 119: ...5 Theory of Operation 5 ...
Страница 159: ...6 Service 6 ...
Страница 177: ...General Disassembly 4 3 2 1 6 Chapter 6 Service Disassembly 175 ...
Страница 178: ...Internal DMM Disassembly 3 2 1 Chapter 6 Service Disassembly 176 ...
Страница 180: ...Additional Chassis Disassembly 1 2 Chapter 6 Service Disassembly 178 ...
Страница 181: ...Plug In Module Disassembly Needle nose Pliers 6 Chapter 6 Service Disassembly 179 ...
Страница 182: ...180 ...
Страница 183: ...7 Replaceable Parts 7 ...
Страница 220: ...Chapter 7 Replaceable Parts Manufacturer s List 218 ...
Страница 221: ...8 Schematics 8 ...
Страница 272: ......