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Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer
Importing Netlist and ASCII Files
User Defined
When
User Defined
is selected, the threshold level is selectable from -
6.0 volts to +6.0 volts.
NOTE:
The logic analyzer requires a minimum voltage swing of 500 mV at the probe
tip to recognize changes in logic levels.
NOTE:
The threshold voltage specified also applies to the pod's clock input.
State Clock Setup/Hold (State only)
Setup/Hold
in Format adjusts the relative position of the clock edge
with respect to the time period that data is valid. It is only available
when the analyzer is set up for a
state measurement
.
To Change Clock Setup/Hold
1. Select the
Setup/Hold
button.
2. For each pod pair, choose a Setup/Hold selection from the selection list.
3. Select the
OK
button.
With a single clock edge assigned, the choices range from 4.0 ns Setup/
0.0 ns Hold, to 0.0 ns Setup/4.0 ns Hold. With both edges of a single
clock assigned, the choices are from 4.5 ns Setup/0.0 ns Hold, to 0.0 ns
Setup/4.5 ns Hold. If multiple clocks are assigned, the choices range
from 5.0 ns Setup/0.0 ns Hold, to 0.0 ns Setup/5.0 ns Hold.
The relationship of the clock signal and valid data under the default
setup and hold is shown in the figure below for a generic logic analyzer.
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