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Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer
When Something Goes Wrong
Check that the system is running properly. The logic analyzer and other
probing fixtures such as pin extenders can place too much capacitive load
on a system.
•
Incorrect clock specification
Make sure the target system clock matches the clock specified under
Sampling
.
Also check that the probe's clock channels are attached to the target's
clock lines either directly or through an analysis probe.
If you are using an analysis probe, the probe's User's Guide should show
the correct connections and settings.
•
Bad probe connection
Check that the probe is securely attached to the clock line and is receiving
a signal. The logic analyzer shows activity indicators under the
Sampling
and
Format
tabs.
•
Incorrect signal level
The clock's threshold level is set by the pod threshold. For the logic
analyzer's J clock, check the pod threshold of pod 1 of the
master card
.
See Also
“Performing Clock Setup (State only)” on page 42
“Setting the Pod Threshold” on page 70
Timer is Specified in Sequence, But Never Started
This error occurs because you have used a timer term in your
trigger
sequence
, but not turned the timer on using the timer controls. Timer
controls are available in all sequence levels except the first. You do not
need to turn on the timer in the same sequence level, but it does need
to be on when it is used in the trigger sequence.
This error message always occurs with the
Timer is off in sequence level where it is used
warning.
See “Using Timer Terms” on page 96 for more information on timer
control.
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