6. DMA Controller
47
DMA IMPLEMENTATION
The ZT 8904 DMA architecture external to the 386 EX is illustrated in the following
figure, "
DMA Architecture
." The ZT 8904 supports a single DMA channel for STD bus
DMA slaves. STD bus DMA slaves are I/O devices that use the ZT 8904 DMA channel
0 to transfer data between backplane I/O and ZT 8904 local memory. The ZT 8904
supports the use of both DMA channels for specific 386 EX internal peripherals.
The two DMA channels supported by the ZT 8904 are implemented in the 386 EX by
multiplexing multiple functions onto device pins. This causes mutual exclusion in the
use of certain hardware functions. Pins with shared functions are shown in the following
figure, "
DMA Architecture
." Note that DRQ1 and /DAK1 are shared with RXD1 and
TXD1.
These shared functions prevent using COM 2 while DMA channel 1 is used. If DMA
channel 0 is used but DMA channel 1 is not, COM 2 can be used, but only as a 3-wire
interface (useful if the serial channel is capable of in-band flow control). Conversely, if
COM 2 is used with hardware handshaking, neither DMA channel can be used.
The Ziatech industrial BIOS setup utility supports configuration of the ZT 8904 for either
DMA support (floppy) or for COM 2 support. When the ZT 8904 is configured for COM2
with hardware handshake, the BIOS setup option for COM2 must be set as
"ONBOARD." Note that although the 386 EX supports use of /EOP as an input, the
ZT 8904 implementation does not support buffer termination on assertion of /EOP.
Specific jumper selections (W24-27) are required in order to properly configure the
ZT 8904 to support DMA channel 0 or channel 1. These jumper selections are listed in
Appendix A, "
Jumper Configurations
."
