4. Interrupt Controller
35
7
6
5
4
3
2
1
0
Register: ICW2
Address: Base+1
Vector Pointer
0
Access: Write
Vector
Upper 5 bits of pointer
0
0
Initialization Register ICW2
Register: Master ICW3
Address: Base + 1
Access: Write
0
0
0
0
0
1
0
0
7
6
5
4
3
2
1
0
Master Initialization Register ICW3
Register: Slave ICW3
Address: Base + 1
Access: Write
0
0
0
0
0
0
1
0
7
6
5
4
3
2
1
0
Slave Initialization Register ICW3
0
0
7
6
5
4
3
2
1
0
0
1
Register: ICW4
Address: Base+1
End of interrupt
0 Normal
1 Automatic
Nesting mode
0 Standard
1 Special
0
AEOI
0
SFNM
Access:Write
Initialization Register ICW4
