Xicom XTU-400K, Operation And Installation Manual

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MNC-0500-002 19 of 36 Revision H
Amplifier Communication and Protocol, Octagon ISA CPU
Fault Status
Command Byte : '3'
Response : "AB" formatted as follows:
Byte 'A'
Bit 7: Reserved.
Bit 6: Complement of bit 5.
Bit 5: Latched Helix Arc Fault.
Bit 4: Momentary Helix Arc Fault.
Bit 3: Over Temp Fault.
Bit 2: Over Voltage Fault.
Bit 1: Fan Locked.
Bit 0: Low Line.
Byte 'B'
Bit 7: Reserved.
Bit 6: Complement of bit 5.
Bit 5: Under Voltage Fault.
Bit 4: High Reflected Power.
Bit 3: External Interlock open.
Bit 2: Low Output Power.
Bit 1: High Output Power.
Bit 0: Waveguide Arc Fault.
(If configured with waveguide arc detector)
Notes :
Low Output Power, High Output Power and High Reflected Power are user-defined faults. A
High Reflected Power fault can also occur when the VSWR detection circuit trips.
Fault History
Command Byte : '4'
Response : A list of the last 100 faults. Each fault string has the following format:
"AAAAAAAA YYMMDD HHMM!"
The first eight bytes describe the fault, and the remaining bytes serve as a time-stamp.
Each string is terminated by '!'; the last string in the sequence is followed by an additional
'!'.
Compatibility : Not available when querying amplifiers through controllers.