Wolfson WM8580, Instruction Manual

Page: 5 / 103

Production Data
WM8580
w
PD, Rev 4.7, March 2009
5
PIN DESCRIPTION
PIN NAME TYPE DESCRIPTION
1 PGND Supply PLL ground
2 PVDD Supply PLL positive supply
3 XTI Digital Input Crystal or CMOS clock input
4 XTO Digital Output Crystal output
5 MFP10 Digital Output Multi-Function Pin (MFP) 10. See Table 1 for details of all MFP pins.
6 MFP9 Digital Output Multi-Function Pin (MFP) 9. See Table 1 for details of all MFP pins.
7 MFP8 Digital Input/Output Multi-Function Pin (MFP) 8. See Table 1 for details of all MFP pins.
8 MFP7 Digital Input/Output Multi-Function Pin (MFP) 7. See Table 1 for details of all MFP pins.
9 MFP6 Digital Input/Output Multi-Function Pin (MFP) 6. See Table 1 for details of all MFP pins.
10 SPDIFOP Digital Output S/PDIF transmitter output.
11 MFP5 Digital Input/Output Multi-Function Pin (MFP) 5. See Table 1 for details of all MFP pins.
12 MFP4 Digital Input/Output Multi-Function Pin (MFP) 4. See Table 1 for details of all MFP pins.
13 MFP3 Digital Input/Output Multi-Function Pin (MFP) 3. See Table 1 for details of all MFP pins.
14 SPDIFIN1 Digital Input S/PDIF receiver input 1
15 CLKOUT Digital Output PLL or crystal oscillator clock output
16 DVDD Supply Digital positive supply
17 DGND Supply Digital ground
18 MUTE Digital Input/Output DAC mute-all Input / All-DAC Infinite Zero Detect (IZD) flag output
19 DIN1 Digital Input Primary Audio Interface (PAIF) receiver data input 1
20 DIN2 Digital Input Primary Audio Interface (PAIF) receiver data input 2
21 DIN3 Digital Input Primary Audio Interface (PAIF) receiver data input 3
22 PAIFRX_LRCLK Digital Input/Output Primary Audio Interface (PAIF) receiver left/right word clock
23 PAIFRX_BCLK Digital Input/Output Primary Audio Interface (PAIF) receiver bit clock
24 MCLK Digital Input/Output System Master clock; 256, 384, 512, 768, 1024 or 1152 fs
25 DOUT Digital Output Primary Audio Interface (PAIF) transmitter data output
26 PAIFTX_LRCLK Digital Input/Output Primary audio interface transmitter left/right word clock
27 MFP1 Digital Input/Output Multi-Function Pin (MFP) 1. See Table 1 for details of all MFP pins.
28 MFP2 Digital Input/Output Multi-Function Pin (MFP) 2. See Table 1 for details of all MFP pins.
29 HWMODE Digital Input Configures control to be either Software Mode or Hardware Mode
30 SWMODE Digital Input/Output Configures software interface to be either 2-wire or 3-wire. See note 2.
31 SDO Digital Output 3-wire control interface data output. See note 3.
32 SDIN Digital Input/Output Control interface data input (and output under 2-wire control)
33 SCLK Digital Input Control interface clock
34 CSB Digital Input 3-wire control interface latch signal / device address selection
35 AINR Analogue Input ADC Right Channel Input
36 AINL Analogue Input ADC Left Channel Input
37 ADCREFP Analogue Output ADC reference buffer decoupling pin; 10uF external decoupling
38 VMID Analogue Output Midrail divider decoupling pin; 10uF external decoupling
39 AGND Supply Analogue ground
40 AVDD Supply Analogue positive supply
41 VOUT1L Analogue Output DAC channel 1 left output
42 VOUT1R Analogue Output DAC channel 1 right output
43 VOUT2L Analogue Output DAC channel 2 left output
44 VOUT2R Analogue Output DAC channel 2 right output
45 VREFP Analogue Input DAC and ADC positive reference
46 VREFN Analogue Input DAC and ADC ground reference
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