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WM8580
Production
Data
w
PD, Rev 4.7, March 2009
88
REGISTER
ADDRESS
BIT LABEL DEFAULT
DESCRIPTION
R18
DAC
Control 4
12h
5:0 PHASE
[5:0]
111111
Controls phase of DAC outputs
PHASE[0] = 0 inverts phase of DAC1L output
PHASE[1] = 0 inverts phase of DAC1R output
PHASE[2] = 0 inverts phase of DAC2L output
PHASE[3] = 0 inverts phase of DAC2R output
PHASE[4] = 0 inverts phase of DAC3L output
PHASE[5] = 0 inverts phase of DAC3R output
2:0
DMUTE[2:0]
000
DAC channel soft mute enables
DMUTE[0] = 1, enable soft-mute on DAC1
DMUTE[1] = 1, enable soft-mute on DAC2
DMUTE[2] = 1, enable soft-mute on DAC3
4
MUTEALL
0
DAC channel master soft mute. Mutes all DAC channels
0 = disable soft-mute on all DACs
1 = enable soft-mute on all DACs
5
DZCEN
0
DAC Digital Volume Zero Cross Enable
0 = Zero Cross detect disabled
1 = Zero Cross detect enabled
6 DACATC
0 Attenuator
Control
0 = All DACs use attenuations as programmed.
1 = Right channel DACs use corresponding left DAC
attenuations
R19
DAC
Control 5
13h
7
MPDENB
0
MUTE pin decode enable
0 = MUTE activates soft-mute on DAC selected by DZFM
1 = MUTE activates softmute on all DACs
7:0 LDA1[7:0] 11111111
(0dB)
Digital Attenuation control for DAC1 Left Channel (DACL1) in
0.5dB steps. See Table 23
R20
Digital
Attenuation
DACL 1
14h
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store LDA1 in intermediate latch (no change to output)
1 = Apply LDA1 and update attenuation on all channels
7:0 RDA1[6:0] 11111111
(0dB)
Digital Attenuation control for DAC1 Right Channel (DACR1) in
0.5dB steps. See Table 23
R21
Digital
Attenuation
DACR 1
15h
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store RDA1 in intermediate latch (no change to output)
1 = Apply RDA1 and update attenuation on all channels
7:0 LDA2[7:0] 11111111
(0dB)
Digital Attenuation control for DAC2 Left Channel (DACL2) in
0.5dB steps. See Table 23
R22
Digital
Attenuation
DACL 2
16h
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store LDA2 in intermediate latch (no change to output)
1 = Apply LDA2 and update attenuation on all channels
7:0 RDA2[7:0] 11111111
(0dB)
Digital Attenuation control for DAC2 Right Channel (DACR2) in
0.5dB steps. See Table 23
R23
Digital
Attenuation
DACR 2
17h
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store RDA2 in intermediate latch (no change to output)
1 = Apply RDA2 and update attenuation on all channels
7:0 LDA3[7:0] 11111111
(0dB)
Digital Attenuation control for DAC3 Left Channel (DACL3) in
0.5dB steps. See Table 23
R24
Digital
Attenuation
DACL 3
18h
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0 = Store LDA3 in intermediate latch (no change to output)
1 = Apply LDA3 and update attenuation on all channels
R25
Digital
7:0 RDA3[7:0] 11111111
(0dB)
Digital Attenuation control for DAC3 Right Channel (DACR3) in
0.5dB steps. See Table 23.
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