UNION SWITCH & SIGNAL
GENISYS II System Hardware Installation
2-10
August 1999
SM-6900B Rev. 0.0
Jumper
ID
Description
Position
Notes
JMP30
FLASH Programming Voltage
Off
5V
12V
Position 1-2
Position 2-3
Position 3-4
2
JMP31
CPS Drive Normal
Position 1-2
1
JMP32
Route serial port 4 TXD to rear connector
Route maintenance port TXD to rear conn.
Position 1-2
Position 2-3
3
JMP33
Route serial port 4 RXD to rear connector
Route maintenance port RXD to rear conn.
Position 1-2
Position 2-3
3
Notes:
1.
If header posts are not installed in these locations, no jumper is required.
2.
Settings shown in boldface are the normal jumper positions, which lock the FLASH
devices and prevent their contents from being modified. Refer to the FLASH
Programming Instructions for further information.
3.
Either the maintenance port or serial port 4 can be routed to the top rear CPU
connector. If the maintenance port is routed to the rear connector, serial port 4 is not
available on the top rear CPU connector.
2.2.3.1.2 DIP Switch SW1
Currently, only switch 1 is used. Switch 1 should be set in the OPEN position. The remaining
rockers should be left in the closed position.
2.2.3.1.3 PCMCIA Cards
The CPU board is designed to incorporate a PCMCIA memory card module to provide additional
static RAM as needed for logging user selected events. PCMCIA cards supporting up to six
megabytes of static RAM memory are available for use. Contact US&S Customer Service for
additional information on availability. The PCMCIA memory card module may be installed in
either the upper or lower card slot. Both card slots may not be used at the same time.
2.2.3.2
Configuring the GENISYS II Power Supply
Verify that JP1 is installed in the OUT position or is not installed at all.
Summary of Contents for GENISYS II
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