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e-STUDIO550/650/810 RADF
16 - 66
JUNE 2002 © TOSHIBA TEC
(7) Reset circuit
This circuit generates a CPU reset signal when the power is turned ON and the power voltage is
detected to have become lower.
The level of IC5-6pin (OUT) is normally "H" after the power is turned ON. However, when the power is
turned OFF or the voltage of the +5V power supply is decreased to 4.25V or lower for some reason, the
level of IC5-6pin becomes "L" and the CPU is reset.
(8) EEPROM circuit
This circuit is an EEPROM to store ADF data and its peripheral circuit.
IC3 is a memory to store the adjustment value for reflection-type sensors, and data are sent/received
between IC3 and CPU using a 4-line type serial interface. Data saved in the IC3 is not erased even if
the power is turned OFF.
IC3-1pin (CS) is a chip selection terminal and its level is "H" when data are being sent/received.
IC3-2pin (SK) is a serial clock terminal, and the serial data are sent in synchronization with the clock
input which is input to this terminal.
IC3-3pin (DI) is a input terminal for serial data and IC3-4pin (DO) is an output terminal for serial data.
Summary of Contents for e-STUDIO 550
Page 2: ...Copyright 2002 TOSHIBA TEC CORPORATION ...
Page 338: ...18 PC BOARDS ...
Page 339: ...JUNE 2002 TOSHIBA TEC 18 1 e STUDIO550 650 810 PC BOARDS 18 PC BOARDS 1 PWA F SYS 340 ...
Page 340: ...e STUDIO550 650 810 PC BOARDS 18 2 JUNE 2002 TOSHIBA TEC 2 PWA F LGC 340 ...
Page 341: ...JUNE 2002 TOSHIBA TEC 18 3 e STUDIO550 650 810 PC BOARDS 3 PWA F SLG 340 ...
Page 342: ...e STUDIO550 650 810 PC BOARDS 18 4 JUNE 2002 TOSHIBA TEC 4 PWA F PLG 340 ...
Page 343: ...JUNE 2002 TOSHIBA TEC 18 5 e STUDIO550 650 810 PC BOARDS 5 PWA F CCD2 340 ...
Page 346: ...1 1 KANDA NISHIKI CHO CHIYODA KU TOKYO 101 8442 JAPAN R02032111900 TTEC ...