Cinterion
®
MV31-W Hardware Interface Description
5.5 Timing Sequence Requirement
75
t
MV31-W_HID_v01.009a
2022-04-27
Public / Preliminary
Page 55 of 76
Figure 27:
Power on timing diagram
Table 23:
Power On information
Symbol
Minimum value
Note
tPr
10ms
Keep 3.3V power supply before Full_Card_Power_Off# assert.
There is no tPr if the power supply is always ready.
ton1
150µs
Keep PCIe_CLK stable before PERST# is inactive.
ton2
150ms
PERST# should be deasserted after a Full_Card_Power_Off#
tPr
ton1
ton2
VBAT_3.3V
Full_Card_Power Off#
PECLK
PERST#