Texas Instruments TRF7963A, Manual

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2
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I/O_6
I/O_5
I/O_4
I/O_3
I/O_2
I/O_1
I/O_0
I/O_7
VIN
VDD_RF
VDD_PA
TX_OUT
VSS_PA
VSS_RX
RX_IN1
VDD_A
OSC_IN OSC_OUT VSS_D EN SYS_CLK DA
T
A_CLK
EN2
VDD_X
VSS
BG
ASK/OOK
IRQ
MOD
VSS_A
VDD_I/O
RX_IN2
24
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9 10 11 13 14 12 15 16
32 31 30 28 27 29 26 25
Thermal Pad
(connect to ground)
6
TRF7963A
SLOS758G – DECEMBER 2011 – REVISED MARCH 2020 www.ti.com
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Terminal Configuration and Functions
Copyright © 2011–2020, Texas Instruments Incorporated
(1) SUP = Supply, INP = Input, BID = Bidirectional, OUT = Output
4 Terminal Configuration and Functions
4.1 Pin Diagrams
Figure 4-1 shows the pinout for the 32-pin RHB package.
Figure 4-1. 32-Pin RHB Package (Top View)
4.2 Signal Descriptions
Table 4-1 describes the signals.
Table 4-1. Signal Descriptions
TERMINAL
TYPE
(1)
DESCRIPTION
NO. NAME
1 VDD_A OUT Internal regulated supply (2.7 V to 3.4 V) for analog circuitry
2 VIN SUP External supply input to chip (2.7 V to 5.5 V)
3 VDD_RF OUT Internal regulated supply (2.7 V to 5 V); normally connected to VDD_PA (pin 4)
4 VDD_PA INP Supply for PA; normally connected externally to VDD_RF (pin 3)
5 TX_OUT OUT RF output (selectable output power: 100 mW or 200 mW, with V
DD
= 5 V)
6 VSS_PA SUP Negative supply for PA; normally connected to circuit ground
7 VSS_RX SUP Negative supply for receive inputs; normally connected to circuit ground
8 RX_IN1 INP Main receive input
9 RX_IN2 INP Auxiliary receive input
10 VSS SUP Chip substrate ground
11 BAND_GAP OUT Bandgap voltage (V
BG
= 1.6 V); internal analog voltage reference
12 ASK/OOK BID
Selection between ASK and OOK modulation (0 = ASK, 1 = OOK) for direct mode 0 and 1.
It can be configured as an output to provide the received analog signal output.
13 IRQ OUT Interrupt request
14 MOD
INP External data modulation input for direct mode 0 or 1
OUT Subcarrier digital data output (see register 0x1A and 0x1B definitions)
15 VSS_A SUP Negative supply for internal analog circuits. Connected to GND.
16 VDD_I/O INP Supply for I/O communications (1.8 V to VIN) level shifter. VIN should be never exceeded.
17 I/O_0 BID I/O pin for parallel communication
18 I/O_1 BID I/O pin for parallel communication
19 I/O_2 BID I/O pin for parallel communication