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SLOS758G – DECEMBER 2011 – REVISED MARCH 2020
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Detailed Description
Copyright © 2011–2020, Texas Instruments Incorporated
6.3
Supply Arrangements
Regulator Supply Input: VIN
The positive supply at VIN (pin 2) has an input voltage range of 2.7 V to 5.5 V. VIN provides the supply
input sources for three internal regulators with the output voltages VDD_RF, VDD_A, and VDD_X.
External bypass capacitors for supply noise filtering must be used (per reference schematics).
NOTE
VIN must be the highest voltage supplied to the TRF7963A.
RF Power Amplifier Regulator: VDD_RF
The VDD_RF (pin 3) regulator is supplying the RF power amplifier. The voltage regulator can be set for
either 5-V or 3-V operation. External bypass capacitors for supply noise filtering must be used (per
reference schematics). When configured for 5-V manual operation, the VDD_RF output voltage can be set
from 4.3 V to 5 V in 100-mV steps. In 3-V manual operation, the output can be programmed from 2.7 V to
3.4 V in 100-mV steps (see
). The maximum output current capability for 5-V operation is 150
mA and for 3-V operation is 100 mA.
Analog Supply Regulator: VDD_A
Regulator VDD_A (pin 1) supplies the analog circuits of the device. The output voltage setting depends on
the input voltage and can be set for 5-V and 3-V operation. When configured for 5-V manual operation,
the output voltage is fixed at 3.4 V. External bypass capacitors for supply noise filtering must be used (per
reference schematics). When configured for 3-V manual operation, the VDD_A output can be set from 2.7
V to 3.4 V in 100-mV steps (see
).
NOTE
The configuration of VDD_A and VDD_X regulators are not independent from each other.
The VDD_A output current should not exceed 20 mA.
Digital Supply Regulator: VDD_X
The digital supply regulator VDD_X (pin 32) provides the power for the internal digital building blocks and
can also be used to supply external electronics within the reader system. When configured for 3-V
operation, the output voltage can be set from 2.7 to 3.4 V in 100-mV steps. External bypass capacitors for
supply noise filtering must be used (refer to the reference schematics).
NOTE
The configuration of the VDD_A and VDD_X regulators are not independent from each other.
The VDD_X output current should not exceed 20 mA.
The RF power amplifier regulator (VDD_RF), analog supply regulator (VDD_A), and digital supply
regulator (VDD_X) can be configured to operate in either automatic or manual mode described in
. The automatic regulator setting mode ensures an optimal compromise between PSRR and the highest
possible supply voltage to ensure maximum RF power output.
By default, the regulators are set in automatic regulator setting mode. In this mode, the regulators are
automatically set every time the system is activated by setting EN input High or each time the automatic
regulator setting bit, B7 in register 0x0B is set to a 1. The action is started on the 0 to 1 transition. This
means that, if the user wants to rerun the automatic setting from a state in which the automatic setting bit
is already high, the automatic setting bit (B7 in register 0x0B) should be changed: 1-0-1.
