Texas Instruments TRF7963A, Manual

Page: 24 / 73

24
TRF7963A
SLOS758G – DECEMBER 2011 – REVISED MARCH 2020 www.ti.com
Submit Documentation Feedback
Product Folder Links: TRF7963A
Detailed Description
Copyright © 2011–2020, Texas Instruments Incorporated
(1) MOSI = Master out, slave in
(2) MISO = Master in, slave out
(3) The I/O_5 pin is used only for information when data is put out of the chip (for example, reading 1 byte from the chip). It is necessary
first to write in the address of the register (8 clocks) and then to generate another 8 clocks for reading out the data. The I/O_5 pin goes
high during the second 8 clocks. But for normal SPI operations I/O_5 pin is not used.
(4) The slave select pin is active low.
The TRF7963A always behaves as the slave, while the microcontroller (MCU) behaves as the master
device. The MCU initiates all communications with the TRF7963A. The TRF7963A makes use of the
Interrupt Request (IRQ) pin in both parallel and SPI modes to prompt the MCU for servicing attention.
Table 6-6. Pin Assignment in Parallel and Serial Interface Connection or Direct Mode
PIN PARALLEL PARALLEL DIRECT SPI WITH SS SPI WITHOUT SS
DATA_CLK DATA_CLK DATA_CLK DATA_CLK from master DATA_CLK from master
I/O_7 A/D[7] MOSI
(1)
= data in (reader in) MOSI
(1)
= data in (reader in)
I/O_6 A/D[6]
Direct mode, data out
(subcarrier or bit stream)
MISO
(2)
= data out (MCU out) MISO
(2)
= data out (MCU out)
I/O_5 (3) A/D[5] Direct mode, strobe (bit clock out) See
(3)
See
(3)
I/O_4 A/D[4] SS (slave select)
(4)
–
I/O_3 A/D[3] – – –
I/O_2 A/D[2] – At VDD At VDD
I/O_1 A/D[1] – At VDD At VSS
I/O_0 A/D[0] – At VSS At VSS
IRQ IRQ interrupt IRQ interrupt IRQ interrupt IRQ interrupt
Communication is initialized by a start condition, which is expected to be followed by an
Address/Command word (Adr/Cmd). The Adr/Cmd word is 8 bits long, and
Table 6-7 describes its format.
Table 6-7. Address/Command Word Bit Distribution
BIT DESCRIPTION BIT FUNCTION ADDRESS COMMAND
B7 Command control bit
0 = Address
1 = Command
0 1
B6 Read/Write
1 = Read
0 = Write
R/W 0
B5 Continuous address mode 1 = Continuous mode R/W 0
B4 Address/command bit 4 Adr 4 Cmd 4
B3 Address/command bit 3 Adr 3 Cmd 3
B2 Address/command bit 2 Adr 2 Cmd 2
B1 Address/command bit 1 Adr 1 Cmd 1
B0 Address/command bit 0 Adr 0 Cmd 0
The MSB (bit 7) determines if the word is to be used as a command or as an address. The last two
columns of
Table 6-7 list the function of the separate bits if either address or command is written. Data is
expected once the address word is sent. In continuous address mode (continuous mode = 1), the first
data that follows the address is written (or read) to (from) the given address. For each additional data, the
address is incremented by one. Continuous mode can be used to write to a block of control registers in a
single stream without changing the address; for example, setup of the predefined standard control
registers from the MCU nonvolatile memory to the reader. In noncontinuous address mode (simple
addressed mode), only one data word is expected after the address.
Address Mode is used to write or read the configuration registers or the FIFO. When writing more than
12 bytes to the FIFO, the Continuous Address Mode should be set to 1.
The Command Mode is used to enter a command that results in reader action (for example, initialize
transmission, enable reader, and turn reader on or off).