14
SLOS758G – DECEMBER 2011 – REVISED MARCH 2020
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Detailed Description
Copyright © 2011–2020, Texas Instruments Incorporated
(1)
x = don't care
Table 6-2. Supply Regulator Setting: 3-V System
REGISTER
ADDRESS
OPTION BITS SETTING IN REGULATOR CONTROL
REGISTER
(1)
COMMENTS
B7
B6
B5
B4
B3
B2
B1
B0
Automatic Mode (default)
0B
1
x
x
x
x
x
1
1
Automatic regulator setting with 250-mV difference
0B
1
x
x
x
x
x
1
0
Automatic regulator setting with 350-mV difference
0B
1
x
x
x
x
x
0
0
Automatic regulator setting with 400-mV difference
Manual Mode
0B
0
x
x
x
x
1
1
1
VDD_RF = 3.4 V, VDD_A = 3.4 V, VDD_X = 3.4 V
0B
0
x
x
x
x
1
1
0
VDD_RF = 3.3 V, VDD_A = 3.3 V, VDD_X = 3.3 V
0B
0
x
x
x
x
1
0
1
VDD_RF = 3.2 V, VDD_A = 3.2 V, VDD_X = 3.2 V
0B
0
x
x
x
x
1
0
0
VDD_RF = 3.1 V, VDD_A = 3.1 V, VDD_X = 3.1 V
0B
0
x
x
x
x
0
1
1
VDD_RF = 3.0 V, VDD_A = 3.0 V, VDD_X = 3.0 V
0B
0
x
x
x
x
0
1
0
VDD_RF = 2.9 V, VDD_A = 2.9 V, VDD_X = 2.9 V
0B
0
x
x
x
x
0
0
1
VDD_RF = 2.8 V, VDD_A = 2.8 V, VDD_X = 2.8 V
0B
0
x
x
x
x
0
0
0
VDD_RF = 2.7 V, VDD_A = 2.7 V, VDD_X = 2.7 V
The regulator configuration function adjusts the regulator outputs by default to 250 mV below VIN level,
but not higher than 5 V for VDD_RF, 3.4 V for VDD_A and VDD_X. This ensures the highest possible
supply voltage for the RF output stage while maintaining an adequate PSRR (power supply rejection
ratio).
To further improve the PSRR, it is possible to increase the target voltage difference across VDD_X and
VDD_A from its default to 350 mV or even 400 mV (for details, see Regulator and I/O Control register
0x0B definition and
.)
6.5
Power Modes
The chip has several power states, which are controlled by two input pins (EN and EN2) and several bits
in the Chip Status Control register (0x00).
lists the configuration for the different power modes when using a 5-V or 3-V system supply.
The main reader enable signal is pin EN. When EN is set high, all of the reader regulators are enabled,
the 13.56-MHz oscillator is running, and the SYS_CLK (output clock for external microcontroller) is also
available.
The Regulator Control register settings shown are for optimized power out. The automatic setting
(normally 0x87) is optimized for best PSRR and noise reduction.
