Texas Instruments TPS6594-Q1 Series, User Manual

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1 SLVUBT0 – December 2019
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Copyright © 2019, Texas Instruments Incorporated
TPS6594x-Q1 Evaluation Module
User's Guide
SLVUBT0 – December 2019
TPS6594x-Q1 Evaluation Module
The TPS6594x-Q1 Evaluation Module (EVM) highlights the performance and flexibility of the TPS6594x-
Q1 power management integrated circuit (PMIC). The modular design allows the EVMs to be stacked to
provide a multi-PMIC solution with a single PMIC acting as the master and up to five PMIC slaves. This
document should be used in conjunction with the Programmable Processor PMIC's GUI User's Guide
SLVUBT8 and the TPS6594x-Q1 Power Management IC (PMIC) with 4-phase 14-A Buck for Processors
SLVSEA7 .
Contents
1 Introduction
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2 Getting Started
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2.1 Getting Started: Single EVM
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2.2 Getting Started: Multiple EVM Evaluation
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2.3 The GUI Tool
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3 EVM Details
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3.1 Terminal Blocks
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3.2 Test Point Descriptions
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3.3 Configuration Headers
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3.4 Signal Headers
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3.5 Stack-up Headers
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3.6 Connectors
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3.7 EVM Control, GPIO, and additional regulators
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4 Customization
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4.1 Changing the Communication Interface
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4.2 Changing the Phase Configuration
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5 Additional Resources
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6 Schematic, Layout, and Bill of Materials
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7 Typical Data
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8 EMI Data
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9 Thermal Data
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List of Figures
1 EVM Top View
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2 EVM Header J7
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3 LDO Headers
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4 EVM Masters Slave Configuration
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5 EVM Bottom View
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6 Header J37, Recommended Power Sequence (Enable) for Master and One or More Slaves
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7 Interface Settings for I
2
C Communication
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8 Interface Settings for SPI Communication
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9 Phase Configuration Components
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10 Schematic Page 1
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11 Schematic Page 2
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12 Layout Top, Layer 1
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13 Layout Ground, Layer 2
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14 Layout Signal, Layer 3
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