
VCCA
SW_B1
OSC32KIN
OSC32KCAP
OSC32KOUT
OVPGDRV
FB_B1
VCCA
Q1
47µF
C24
L1 470nH
10V
D1
J6
C3
J1
VOUT_B1
J2
J3
J4
J5
L2 470nH
L3 470nH
L4 470nH
L5 470nH
VOUT_LDOVINT
VOUT_LDOVRTC
VOUT_LDO1
VOUT_LDO2
VOUT_LDO3
VOUT_LDO4
VSYS
680µF
C79
AMUXOUT
PVIN_LDO4
PVIN_LDO3
PVIN_LDO12
C55
10uF
TP1
TP2
Note: The capacitors in the schematic are populated
for max load use case; actual capacitor placement
should be reconfigured according to actual use cases.
nPWRON_S
10k
R27
1
2
S1
Note: Jumper on J37-2-3 for Master to provide power
on signal (LDOVINT) for slaves; all slaves jumper on
J37-1-2 to get power on signal (ENABLE) from master.
No jumper on J37 when single PMIC is used.
VOUT_LDOVINT
2.2uF
C8
2.2uF
C10
2.2uF
C11
2.2uF
C12
2.2uF
C13
2.2uF
C15
VIO_IN
SW_B2
SW_B3
SW_B4
SW_B5
FB_B2
FB_B3
FB_B4
FB_B5
FB_B1
FB_B3
FB_B4
FB_B5
FB_B2
Phase Config
R2/R3
R4/R5
R6/R7
J23 J24
J25
1 (4)
R2
-
-
Y
Y
Y
2 (3+1)
R2
-
R7
Y
Y
N
3 (2+1+1)
R2
R5
R7
Y
N
N
4 (1+1+1+1)
R3
R5
R7
N
N
N
5 (2+2)
R2
R5
R6
Y
N
Y
1
2
3
4
5
6
J16
1
2
3
4
5
6
J17
VOUT_B1
VOUT_B2
VOUT_B2
VOUT_B3
VOUT_B1
VOUT_B3
VOUT_B4
VOUT_B4
240
R20
240
R21
10k
R8
VIO_IN
VCCA
PVIN_LDO4
VOUT_LDO4
D3
D4
D5
TP4
TP5
TP14
TP3
150uF
C2
0.002
R25
10k
R28
10k
R33
VOUT_LDO3
PVIN_LDO3
VOUT_LDO3
PVIN_LDO3
PVIN_LDO4
2.2uF
C4
VCCA
SDA_I2C1/SDI_SPI
SCL_I2C1/SCK_SPI
0.47uF
C9
0.47uF
C14
10uF
C36
0.1µF
C35
0.1µF
C39
47µF
C29
1µF
C68
22uF
C18
47µF
C25
VOUT_B2
47µF
C30
22uF
C19
47µF
C26
47µF
C31
22uF
C20
47µF
C27
47µF
C32
22uF
C21
47µF
C28
47µF
C33
22uF
C22
VOUT_B3
VOUT_B4
VOUT_B5
C63
10uF
1µF
C74
C60
10uF
0.1µF
C40
0.1µF
C43
1µF
C71
C65
10uF
1µF
C76
C61
10uF
0.1µF
C41
0.1µF
C44
1µF
C72
C66
10uF
1µF
C77
C59
10uF
0.1µF
C37
0.1µF
C42
1µF
C70
C64
10uF
1µF
C75
C54
10uF
0.1µF
C34
0.1µF
C38
1µF
C67
47µF
C45
47µF
C49
C62
10uF
1µF
C73
0.1µF
C23
TPS65941-Q1
VOUT_LDO2
11
OSC32KIN
38
GPIO2
33
SW_B2
15
SW_B5
34
REFGND2
6
PVIN_B2
17
GPIO4
47
VSYS_SENSE
51
VOUT_LDO3
9
INT
14
OVPGDRV
52
VOUT_LDOVRTC
3
PVIN_LDO12
12
REFGND1
5
FB_B3
49
VOUT_LDO4
7
RSTOUT
25
PVIN_B4
54
GND
57
EN_DRV
29
GPIO8
41
SDA_I2C1/SDI_SPI
30
FB_B1
22
VOUT_LDO1
13
OSC32KCAP
40
SCL_I2C1/SCK_SPI
31
PVIN_B1
26
GPIO5
23
GPIO6
24
GPIO7
18
GPIO9
19
SW_B3
43
VIO_IN
48
SW_B3
44
SW_B1
27
VOUT_LDOVINT
2
VCCA
4
PVIN_B3
45
PWRON/ENABLE
20
GPIO10
42
VBACKUP
36
SW_B4
56
PVIN_LDO3
10
SW_B2
16
PVIN_B5
35
FB_B5
37
SW_B4
55
FB_B2
21
AMUXOUT
1
OSC32KOUT
39
GPIO1
32
FB_B4
50
GPIO11
53
SW_B1
28
PVIN_LDO4
8
GPIO3
46
U1
2.2uF
C5
2.2uF
C6
VOUT_LDO4
1
2
3
4
5
J32
1
2
3
4
5
J33
1
2
3
4
5
J35
1
2
3
4
5
J34
GPIO3
GPIO4
GPIO7
GPIO8
GPIO9
GPIO11
GPIO7
nINT
EN_DRV
0
R1
0
R2
0
R3
0
R4
0
R5
0
R6
0
R7
0
R67
nPWRON
nRSTOUT
1
2
3
4
5
J36
10uF
C47
0
R26
47µF
C46
47µF
C50
47µF
C51
47µF
C56
47µF
C52
47µF
C57
47µF
C48
47µF
C53
_S
_S
_S
_S
_S
_S
_S
_S
VBACKUP
For LDOs PSRR, line and load
regulation measurements
1
2
32.768kHz
Y1
1
2
3
J18
1
2
3
J19
1
2
3
J20
1
2
3
J21
1
2
3
J26
1
2
3
J37
10uF
C58
10uF
C69
10uF
C78
J23
J25
J24
VOUT_B2
VOUT_B3
VOUT_B1
VOUT_B4
VOUT_LDOVINT
VOUT_LDOVRTC
VIO_IN
1.2k
R22
1.2k
R23
1.2k
R24
GPIO11
nPWRON
TP9
TP10
TP11
TP12
TP13
SCLK_SPMI
SDATA_SPMI
nERR_SoC
nERR_MCU
GPIO2
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
VOUT_LDOVINT
VOUT_LDOVRTC
VOUT_LDO1
VOUT_LDO2
VOUT_LDO3
VOUT_LDO4
VOUT_B1
VOUT_B2
VOUT_B3
VOUT_B4
VOUT_B5
TP6
TP7
0
R35
0
R36
22uF
C1
22uF
C94
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
10k
R9
10k
R10
10k
R11
10k
R12
10k
R13
10k
R14
10k
R15
10k
R16
10k
R17
10k
R18
GPIO1
VCCA_S
GPIO3
TP8
GPIO1
GPIO10
0.1µF
C93
3300pF
C102
0.1µF
C99
3300pF
C104
0.1µF
C100
3300pF
C103
3300pF
C101
3300pF
C105
VSYS
VCCA
VIO_IN
VCCA_S
0
R40
VCCA
0.1µF
C106
D2
5
4
1
2
3
6
7
J13
5
4
1
2
3
6
7
J12
0
R58
0
R65
6pF
C16
6pF
C17
22uF
C7
SCL_I2C2/CS_SPI
SDA_I2C2/SDO_SPI
5
4
1
2
3
6
7
J14
AMUXOUT
TRIG_WDG
TRIG_WDG
SYNCCLKIN
5
4
1
2
3
6
7
8
9
10
11
J7
5
4
1
2
3
6
7
8
9
10
11
J8
5
4
1
2
3
6
7
8
9
10
11
J9
5
4
1
2
3
6
7
8
9
10
11
J10
5
4
1
2
3
6
7
8
9
10
11
J11
GPIO1
100
R32
GPIO1
GPIO2
VIO_IN
nINT
EN_DRV
nPWRON
nRSTOUT
VSYS
SPI_EN
OVPGDRV
VSYS_SENSE
VSYS_SENSE
0
R19
100
R51
100
R54
0
R39
0
R83
5
4
1
2
3
6
7
8
9
10
11
J15
6
7
1
U2A
V+
3
V-
12
U2E
4
5
2
U2B
8
9
14
U2C
10k
R37
10k
R38
VCCA
240
R30
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
GNDS
D7
MCUVCC
+VBUS
NT1
USB_3V3
Force
Sense
MCUVCC
NT2
NT3
Schematic, Layout, and Bill of Materials
16
SLVUBT0 – December 2019
Copyright © 2019, Texas Instruments Incorporated
TPS6594x-Q1 Evaluation Module
6
Schematic, Layout, and Bill of Materials
Figure 10. Schematic Page 1