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Mailbox RAM
(512 Bytes)
32-Message Mailbox
of 4 x 32-Bit Words
Memory Management
Unit
CPU Interface,
Receive Control Unit,
Timer Management Unit
eCAN Memory
(512 Bytes)
Registers and
Message Objects Control
Message Controller
32
32
eCAN Protocol Kernel
Receive Buffer
Transmit Buffer
Control Buffer
Status Buffer
Enhanced CAN Controller
32
Controls Address
Data
eCAN1INT
eCAN0INT
32
SN65HVD23x
3.3-V CAN Transceiver
CAN Bus
TMS320F2810, TMS320F2811, TMS320F2812
TMS320C2810, TMS320C2811, TMS320C2812
www.ti.com
SPRS174T – APRIL 2001 – REVISED MAY 2012
Figure 4-7. eCAN Block Diagram and Interface Circuit
Copyright © 2001–2012, Texas Instruments Incorporated
Peripherals
69
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TMS320F2810 TMS320F2811 TMS320F2812 TMS320C2810 TMS320C2811 TMS320C2812