PRODUCTPREVIEW
RM46L852
SPNS185 – SEPTEMBER 2012
NOTE
The EMIF_nWAIT signal has a pull-up on it. The EMIF module generates a "Wait Rise"
interrupt whenever it detects a rising edge on the EMIF_nWAIT signal. This interrupt
condition is indicated as soon as the device is powered up. This can be ignored if the
EMIF_nWAIT signal is not used in the application. If the EMIF_nWAIT signal is actually used
in the application, then the external slave memory must always drive the EMIF_nWAIT signal
such that an interrupt is not caused due to the default pull-up on this signal.
NOTE
The lower-order interrupt channels are higher priority channels than the higher-order interrupt
channels.
NOTE
The application can change the mapping of interrupt sources to the interrupt channels via the
interrupt channel control registers (CHANCTRLx) inside the VIM module.
98
System Information and Electrical Specifications
Copyright © 2012, Texas Instruments Incorporated
Summary of Contents for RM46L852
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