Texas Instruments OMAP36 Series, Technical Reference Manual

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PRCM Basic Programming Model
3.6.2.4.2 CM_FCLKEN_ <domain_name> (Functional Clock Enable Register)
The functional clock enable register allows control of the functional clock activity of each module or
subsystem. All module functional clocks are controllable by software, except for the MPU, interconnect,
and memory subsystems, for which the clocks are automatically controlled by the PRCM.
The device has the following functional clock control registers:
• CM_FCLKEN1_CORE and CM_FCLKEN3_CORE : CORE domain peripherals set
• CM_FCLKEN_CAM : Camera subsystem
• CM_FCLKEN_DSS : DSS subsystem
• CM_FCLKEN_PER : PER domain peripherals set
• CM_FCLKEN_IVA2 : IVA2.2 subsystem
• CM_FCLKEN_SGX : SGX subsystem
• CM_FCLKEN_WKUP : WKUP domain peripherals set
• CM_FCLKEN_USBHOST : HS USB Host subsystem
The software effect is immediate and direct. The functional clock is turned on as soon as the bit is set, and
turned off if the bit is cleared and the clock is not required by any module. On module wakeup, the
functional clock can be automatically restarted.
NOTE: The functional clock supplies the functional part of a module or subsystem, which is not
operational without its functional clock. In some cases, a module or a subsystem may require
multiple functional clocks.
3.6.2.4.3 CM_ICLKEN_ <domain_name> (Interface Clock Enable Register)
The interface clock enable register allows control of the interface clock activity of each module or
subsystem. This register provides control over each module in the device.
The device has following interface clock control registers:
• CM_ICLKEN1_CORE and CM_ICLKEN3_CORE : CORE domain peripherals set
• CM_ICLKEN_CAM : Camera subsystem
• CM_ICLKEN_DSS : DSS subsystem
• CM_ICLKEN_PER : PER domain peripherals set
• CM_ICLKEN_SGX : SGX subsystem
• CM_ICLKEN_WKUP : WKUP domain peripherals set
• CM_ICLKEN_USBHOST : HS USB Host subsystem
This register has an immediate effect, causing the source of the interface clock to be effectively cut (if the
appropriate bit is cleared and no module requires this clock) or activated (if the appropriate bit is set).
Independent functional and interface clock control registers provide potential power savings for each
module. For example, because the configuration port and interface of the module are still active, disabling
a functional clock of a module while keeping its interface clock active (leaving the module inactive but
allowing access to its registers) reduces power consumption.
When the interface clock is disabled, the module cannot communicate with the reset of the device;
therefore, it is in idle mode. For example, the interface clock of a peripheral can be disabled while its
functional clock is active; it is then idled, from the device standpoint, while it can detect any external event.
This configuration typically allows a main part of the device to go into idle mode while keeping a peripheral
active and ready to wake up from an external event.
Because a module may or may not be able to function without its functional or interface clocks,
power-management strategies must be adapted accordingly. This relation is programmable and is defined
in the CLOCKACTIVITY bits of the module SYSCONFIG register; therefore, it requires consistent
programming of the CM_FCLKEN and CM_ICLKEN registers.
407 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated