Public Version
www.ti.com
PRCM Register Manual
Table 3-231. CM_ICLKEN_CAM
Address Offset
0x0000 0010
Physical Address
0x4800 4F10
Instance
CAM_CM
Description
Controls the modules interface clock activity.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
EN_CAM
Bits
Field Name
Description
Type
Reset
31:1
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x00000000
0
EN_CAM
Camera interface clock control
RW
0x0
0x0: CAM_L3_ICK and CAM_L4_ICLK are disabled
0x1: CAM_L3_ICK and CAM_L4_ICLK are enabled
Table 3-232. Register Call Summary for Register CM_ICLKEN_CAM
PRCM Functional Description
•
CAM Power Domain Clock Controls
PRCM Basic Programming Model
•
CM_ICLKEN_ <domain_name> (Interface Clock Enable Register)
PRCM Register Manual
•
Table 3-233. CM_IDLEST_CAM
Address Offset
0x0000 0020
Physical Address
0x4800 4F20
Instance
CAM_CM
Description
Modules access availability monitoring. This register is read only and automatically updated.
Type
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
ST_CAM
Bits
Field Name
Description
Type
Reset
31:1
RESERVED
Read returns 0.
R
0x00000000
0
ST_CAM
Camera standby status.
R
0x1
0x0: Camera is active.
0x1: Camera is in standby mode.
Table 3-234. Register Call Summary for Register CM_IDLEST_CAM
PRCM Basic Programming Model
•
CM_IDLEST_ <domain_name> (Idle-Status Register)
:
PRCM Register Manual
•
519
SWPU177N – December 2009 – Revised November 2010
Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated