Public Version
PRCM Register Manual
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Table 3-228. CAM_CM Register Summary
Register Name
Type
Register Width
Address Offset
Physical Address
Reset Type
(Bits)
RW
32
0x0000 0000
0x4800 4F00
W
RW
32
0x0000 0010
0x4800 4F10
W
R
32
0x0000 0020
0x4800 4F20
C
RW
32
0x0000 0030
0x4800 4F30
W
RW
32
0x0000 0040
0x4800 4F40
W
RW
32
0x0000 0044
0x4800 4F44
W
RW
32
0x0000 0048
0x4800 4F48
W
R
32
0x0000 004C
0x4800 4F4C
C
3.8.1.10.2 CAM_CM Registers
Table 3-229. CM_FCLKEN_CAM
Address Offset
0x0000 0000
Physical Address
0x4800 4F00
Instance
CAM_CM
Description
Controls the modules functional clock activity.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
EN_CSI2
EN_CAM
Bits
Field Name
Description
Type
Reset
31:2
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x00000000
1
EN_CSI2
CSI2 functional clock control (96 MHz)
RW
0x0
0x0: CSI2_96M_FCLK is disabled
0x1: CSI2_96M_FCLK is enabled
0
EN_CAM
Camera functional clock control
RW
0x0
0x0: CAM_MCLK is disabled
0x1: CAM_MCLK is enabled
Table 3-230. Register Call Summary for Register CM_FCLKEN_CAM
PRCM Functional Description
•
CAM Power Domain Clock Controls
PRCM Basic Programming Model
•
CM_FCLKEN_ <domain_name> (Functional Clock Enable Register)
:
PRCM Register Manual
•
518
Power, Reset, and Clock Management
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated