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PRCM Register Manual
Table 3-280. Register Call Summary for Register CM_CLKSTCTRL_NEON
PRCM Functional Description
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:
PRCM Basic Programming Model
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CM_CLKSTCTRL_ <domain_name> (Clock State Control Register)
PRCM Register Manual
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3.8.1.15 USBHOST_CM Registers
3.8.1.15.1 USBHOST_CM Register Summary
Table 3-281. USBHOST_CM Register Summary
Register Name
Type
Register Width
Address Offset
Physical Address
Reset Type
(Bits)
RW
32
0x0000 0000
0x4800 5400
W
RW
32
0x0000 0010
0x4800 5410
W
R
32
0x0000 0020
0x4800 5420
C
RW
32
0x0000 0030
0x4800 5430
W
RW
32
0x0000 0044
0x4800 5444
W
RW
32
0x0000 0048
0x4800 5448
W
R
32
0x0000 004C
0x4800 544C
C
3.8.1.15.2 USBHOST_CM Registers
Table 3-282. CM_FCLKEN_USBHOST
Address Offset
0x0000 0000
Physical Address
0x4800 5400
Instance
USBHOST_CM
Description
Controls the modules functional clock activity.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
EN_USBHOST2
EN_USBHOST1
Bits
Field Name
Description
Type
Reset
31:2
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x00000000
1
EN_USBHOST2
USB HOST 120-MHz functional clock control
RW
0x0
0x0: USBHOST_120M_FCLK is disabled
0x1: USBHOST_120M_FCLK is enabled
0
EN_USBHOST1
USB HOST 48-MHz functional clock control
RW
0x0
0x0: USBHOST_48M_FCLK is disabled
0x1: USBHOST_48M_FCLK is enabled
543
SWPU177N – December 2009 – Revised November 2010
Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated