Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 547 / 3738

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PRCM Register Manual
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
CLKTRCTRL_USBHOST
Bits Field Name Description Type Reset
31:2 RESERVED Write 0s for future compatibility. Read returns 0. R 0x00000000
1:0 CLKTRCTRL_USBHOST Controls the clock state transition of the USB HOST clock RW 0x0
domain.
0x0: Automatic transition is disabled
0x1: Start a software supervised sleep transition on the
domain
0x2: Start a software supervised wake-up transition on
the domain
0x3: Automatic transition is enabled. Transition is
supervised by the HardWare.
Table 3-293. Register Call Summary for Register CM_CLKSTCTRL_USBHOST
PRCM Functional Description
• Device Wake-Up Events : [0] [1] [2]
PRCM Basic Programming Model
• CM_CLKSTCTRL_ <domain_name> (Clock State Control Register) : [3]
PRCM Register Manual
• USBHOST_CM Register Summary : [4]
Table 3-294. CM_CLKSTST_USBHOST
Address Offset 0x0000 004C
Physical Address 0x4800 544C Instance USBHOST_CM
Description This register provides a status on the interface clock activity in the domain.
Type R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
CLKACTIVITY_USBHOST
Bits Field Name Description Type Reset
31:1 RESERVED Write 0s for future compatibility. Read returns 0. R 0x00000000
0 CLKACTIVITY_USBHOST Interface clock activity status R 0x0
0x0: No domain interface clock activity
0x1: Domain interface clock is active
547 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
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