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Individual Instruction Descriptions
4-152
4.14.57
RFLAG
Reset Memory Flag
Syntax
[label]
name
src
Clock,
clk
Word,
w
With RPT,
clk
Class
RFLAG
{
flagadrs}
1
1
N/R
8a
Execution
memory flag bit at {
flagadrs} data memory location
⇐
0
PC
⇐
PC + 1
Flags Affected
None
Opcode
Instructions
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RFLAG
{flagadrs}
1
0
0
1
0
0
0
0
1
1
flagadrs
Description
Reset flag at addressed memory location to 0.{
flagadrs} includes two groups
of memory flag addresses: global flags, which are the first 64 word locations
in RAM; and relative flags, which are 64 locations relative to the page register
(R6). Flag address {
flagadrs} only addresses the 17
th
bit. (See section 4.3.7
for more information)
See Also
SFLAG, STAG, RTAG
Example 4.14.57.1
RFLAG *0x21
Resets the flag bit at RAM byte location 0x0042 to zero.
Example 4.14.57.2
RFLAG *R6 + 0x0002
Resets the flag bit at RAM byte location 0x0084 to zero. Assume R6 = 0x0080. The R6 register is
represented in bytes, but the 0x0002 is represented in words. Thus, 0x0080 bytes plus 0x0002 words
(or 0x0004 bytes) equals 0x0084 (bytes).
Summary of Contents for MSP50C614
Page 1: ...MSP50C614 Mixed Signal Processor User s Guide SPSU014 January 2000 Printed on Recycled Paper ...
Page 6: ...vi ...
Page 92: ...3 22 ...
Page 300: ...Instruction Set Summay 4 208 Assembly Language Instructions ...
Page 314: ...Software Emulator 5 14 Figure 5 13 Project Menu Figure 5 14 Project Open Dialog ...
Page 325: ...Software Emulator 5 25 Code Development Tools Figure 5 25 EPROM Programming Dialog ...
Page 331: ...Software Emulator 5 31 Code Development Tools Figure 5 31 Context Sensitive Help System ...
Page 368: ...5 68 ...
Page 394: ...7 12 ...
Page 402: ...A 8 ...
Page 412: ...Packaging B 10 ...