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Instruction Set Encoding
4-194
Instructions
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SHLTPLS A
n[~], An[~]
1
1
1
0
0
1
1
A
n
1
1
0
1
0
0
A~
~A
SHLAC A
n[~], An[~] [, next A]
1
1
1
0
0
next A
A
n
0
0
1
1
0
0
A~
~A
SHLACS A
n[~], An[~]
1
1
1
0
0
1
1
A
n
0
0
1
1
0
0
A~
~A
SHRAC A
n[~], An[~] [, next A]
1
1
1
0
0
next A
A
n
0
1
0
1
1
0
A~
~A
SHRACS A
n[~], An[~]
1
1
1
0
0
1
1
A
n
0
1
0
1
1
0
A~
~A
STAG {
adrs}
1
1
0
1
0
1
1
0
0
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
SOVM
1
1
1
1
1
1
1
1
0
1
1
0
1
0
0
0
0
SUB A
n[~], An, {adrs} [, next A]
0
0
0
1
~A
next A
A
n
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
SUB A
n[~], An[~], imm16 [, next A]
1
1
1
0
0
next A
A
n
0
1
0
0
0
1
A~
~A
SUB A
n[~], An[~], PH [, next A]
1
1
1
0
0
next A
A
n
0
1
1
0
0
0
A~
~A
SUB A
n[~], An, An~ [, next A]
1
1
1
0
0
next A
A
n
0
0
1
0
0
0
0
~A
SUB A
n[~], An~, An [, next A]
1
1
1
0
0
next A
A
n
0
0
1
0
0
0
1
~A
SUB R
x, imm16
1
1
1
1
1
1
1
0
0
0
0
1
R
x
0
0
SUB R
x, R5
1
1
1
1
1
1
1
0
0
1
0
1
R
x
0
0
SUBB A
n, imm8
1
0
1
0
0
1
0
A
n
imm8
SUBB R
x, imm8
1
0
1
1
0
1
k4
k3
k2
k7
k6
k5
R
x
k1
k0
SUBS A
n[~], An, {adrs}
0
0
0
1
~A
1
1
A
n
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
SUBS A
n[~], An[~], pma16
1
1
1
0
0
1
1
A
n
0
1
0
0
0
1
A~
~A
SUBS A
n[~], An, An~
1
1
1
0
0
1
1
A
n
0
0
1
0
0
0
0
~A
SUBS A
n[~], An~, An
1
1
1
0
0
1
1
A
n
0
0
1
0
0
0
1
~A
SUBS A
n[~], An[~], PH
1
1
1
0
0
1
1
A
n
0
1
1
0
0
0
A~
~A
SXM
1
1
1
1
1
1
1
1
0
1
0
1
0
0
0
0
0
VCALL
vector8
1
1
1
1
1
1
1
0
1
vector8
XOR A
n, {adrs}
0
1
0
0
1
0
0
A
n
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
XOR A
n[~], An[~], imm16 [, next A]
1
1
1
0
0
next A
A
n
1
1
0
0
0
1
A~
~A
XOR A
n[~], An~, An [, next A]
1
1
1
0
0
next A
A
n
0
1
0
0
0
0
A~
~A
XOR TF
n, {flagadrs}
1
0
0
1
1
flg Not
1
1
0
flagadrs
XOR TF
n, {cc} [, Rx]
1
0
0
1
0
flg Not
cc
R
x
1
1
XORB A
n, imm8
1
0
1
0
1
1
0
A
n
imm8
XORS A
n, {adrs}
0
1
0
0
1
0
1
A
n
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
XORS A
n[~], An[~], pma16
1
1
1
0
0
1
1
A
n
1
1
0
0
0
1
A~
~A
XORS A
n[~], An~, An
1
1
1
0
0
1
1
A
n
0
1
0
0
0
0
A~
~A
Summary of Contents for MSP50C614
Page 1: ...MSP50C614 Mixed Signal Processor User s Guide SPSU014 January 2000 Printed on Recycled Paper ...
Page 6: ...vi ...
Page 92: ...3 22 ...
Page 300: ...Instruction Set Summay 4 208 Assembly Language Instructions ...
Page 314: ...Software Emulator 5 14 Figure 5 13 Project Menu Figure 5 14 Project Open Dialog ...
Page 325: ...Software Emulator 5 25 Code Development Tools Figure 5 25 EPROM Programming Dialog ...
Page 331: ...Software Emulator 5 31 Code Development Tools Figure 5 31 Context Sensitive Help System ...
Page 368: ...5 68 ...
Page 394: ...7 12 ...
Page 402: ...A 8 ...
Page 412: ...Packaging B 10 ...