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Individual Instruction Descriptions
4-106
4.14.23
INTD
Interrupt Disable
Syntax
[label]
name
Clock,
clk
Word,
w
With RPT,
clk
Class
INTD
1
1
N/R
9d
Execution
STAT.IM
⇐
0
(IM is STAT bit 4)
PC
⇐
PC + 1
Flags Affected
None
Opcode
Instructions
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
INTD
1
1
1
1
1
1
1
1
0
1
0
0
1
0
0
0
0
Description
Disables interrupts. Resets bit 4 (the IM, interrupt mask bit) of status register
(STAT) to 0.
See Also
INTE, IRET
Example 4.14.23.1
INTD
Disable interrupts. INTD must be always be immediately followed by a NOP. Any maskable interrupt
occurring after the INTD – NOP sequence will not be serviced.
Summary of Contents for MSP50C614
Page 1: ...MSP50C614 Mixed Signal Processor User s Guide SPSU014 January 2000 Printed on Recycled Paper ...
Page 6: ...vi ...
Page 92: ...3 22 ...
Page 300: ...Instruction Set Summay 4 208 Assembly Language Instructions ...
Page 314: ...Software Emulator 5 14 Figure 5 13 Project Menu Figure 5 14 Project Open Dialog ...
Page 325: ...Software Emulator 5 25 Code Development Tools Figure 5 25 EPROM Programming Dialog ...
Page 331: ...Software Emulator 5 31 Code Development Tools Figure 5 31 Context Sensitive Help System ...
Page 368: ...5 68 ...
Page 394: ...7 12 ...
Page 402: ...A 8 ...
Page 412: ...Packaging B 10 ...