Texas Instruments ADS869 Series, Manual

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4.09
4.091
4.092
4.093
4.094
4.095
4.096
4.097
4.098
4.099
4.1
±
40
±
7 26 59 92 125
RE
F
IO
V
o
lta
g
e
(
V
)
Free-Air Temperature (
o
C)
C053
----- AVDD = 5.25 V
------ AVDD = 5 V
------ AVDD = 4.75 V
0
4
8
12
16
20
1 2 3 4 5 6 7 8 9 10
Num
b
e
r
o
f
Device
s
REFIO Drift (ppm/ºC)
C054
0
5
10
15
20
25
30
-4 -3 -2 -1 0 1
Num
b
e
r
o
f
Device
s
Error in REFIO Voltage (mV)
C065
ADS8694, ADS8698
www.ti.com SBAS686 – JULY 2015
The initial accuracy specification for the internal reference can be degraded if the die is exposed to any
mechanical or thermal stress. Heating the device when being soldered to a PCB and any subsequent solder
re
fl ow is a primary cause for shifts in the V
REF
value. The main cause of thermal hysteresis is a change in die
stress and therefore is a function of the package, die-attach material, and molding compound, as well as the
layout of the device itself.
In order to illustrate this effect, 80 devices were soldered using lead-free solder paste with the manufacturer's
suggested reflow profile, as explained in application report
SNOA550 . The internal voltage reference output is
measured before and after the reflow process and the typical shift in value is shown in Figure 59 . Although all
tested units exhibit a positive shift in their output voltages, negative shifts are also possible. Note that the
histogram in
Figure 59 shows the typical shift for exposure to a single reflow profile. Exposure to multiple reflows,
which is common on PCBs with surface-mount components on both sides, causes additional shifts in the output
voltage. If the PCB is to be exposed to multiple reflows, solder the ADS8694 and ADS8698 in the second pass to
minimize device exposure to thermal stress.
Figure 59. Solder Heat Shift Distribution Histogram
The internal reference is also temperature compensated to provide excellent temperature drift over an extended
industrial temperature range of –40°C to 125°C.
Figure 60 shows the variation of the internal reference voltage
across temperature for different values of the AVDD supply voltage. The typical specified value of the reference
voltage drift over temperature is 6 ppm/°C (
Figure 61 ) and the maximum specified temperature drift is equal to
10 ppm/°C.
AVDD = 5 V, number of devices = 30, Δ T = –40°C to 125°C
Figure 60. Variation of the Internal Reference Output Figure 61. Internal Reference Temperature Drift Histogram
(REFIO) Across Supply and Temperature
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