SBAS686 – JULY 2015
Figure 104. Ch n High Threshold LSB Registers
7
6
5
4
3
2
1
0
CHn_HT[7:0]
R/W-1h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 23. Channel n High Threshold LSB Register Field Descriptions
(n = 0 to 7 for the ADS8698; n = 0 to 3 for the ADS8694)
Bit
Field
Type
Reset
Description
7-0
CH
n
_HT[7-0]
R/W
1h
These bits set the LSB for the 16-bit channel
n
high alarm.
(n = 0 to 7 for the ADS8698;
For example, bits 7-0 of the channel 0 register (address 17h) set
n = 0 to 3 for the ADS8694)
the LSB for the channel 0 high alarm threshold. The channel 0
high alarm threshold is AAFFh when bits 7-0 of the ch 0 high
threshold MSB register (address 16h) are set to AAh and bits 7-
0 of the ch 0 high threshold LSB register (address 17h) are set
to FFh.
0000 0000 = LSB byte is 00h
0000 0001 = LSB byte is 01h
0000 0010 to 1111 1110 = LSB byte is 02h to FEh
1111 1111 = LSB byte is FFh
Figure 105. Ch n Low Threshold MSB Registers
7
6
5
4
3
2
1
0
CHn_LT[15:8]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Table 24. Channel n Low Threshold MSB Register Field Descriptions
(n = 0 to 7 for the ADS8698; n = 0 to 3 for the ADS8694)
Bit
Field
Type
Reset
Description
7-0
CH
n
_LT[15:8]
R/W
0h
These bits set the MSB byte for the 16-bit channel
n
low alarm.
(n = 0 to 7 for the ADS8698;
For example, bits 7-0 of the channel 0 register (address 18h) set
n = 0 to 3 for the ADS8694)
the MSB byte for the channel 0 low alarm threshold. The
channel 0 low alarm threshold is AAFFh when bits 7-0 of the ch
0 low threshold MSB register (address 18h) are set to AAh and
bits 7-0 of the ch 0 low threshold LSB register (address 19h) are
set to FFh.
0000 0000 = MSB byte is 00h
0000 0001 = MSB byte is 01h
0000 0010 to 1110 1111 = MSB byte is 02h to FEh
1111 1111 = MSB byte is FFh
Copyright © 2015, Texas Instruments Incorporated
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