T-Core
User Manual
36
January 14, 2020
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Quartus Project directory: ADC_RTL
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Bitstream used: T_CORE.sof
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Demo Batch File: ADC_RTL\demo_batch\test.bat
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Make sure Quartus Prime is installed on your PC
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Connect analog source to the analog input as shown in
Figure 3-10 Connect analog source to the analog input
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Use the USB Cable to connect your PC and the FPGA board and install USB Blaster II driver if
necessary.
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Execute the demo batch file “test.bat” from the directory ADC_RTL\demo_batch.
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Use SW[2:0] to specify measured analog input channel.
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The measured channel and voltage will be displayed on Signal Tap Logic Analyzer as shown in
In the above steps we use a self-made variable voltage output circuit. It uses the T-Core 3.3V as the
power source, the output voltage is adjusted by the divider resistance and the variable resistor of the
circuit, which can convert the T-Core 3.3V to a 0~2.5V analog input (to the ADC_IN0 channel).
