Terasic T-Core, User Manual

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T-Core
User Manual 23 www.terasic.com
January 14, 2020
Figure 2-25 Connections between the Arduino Analog input and MAX 10 FPGA
Table 2-10 shows the pin assignment of 1x10 Analog input header.
Table 2-10 Pin Assignment of Analog Input
Signal Name FPGA Pin No. Description I/O Standard
ADC_IN [0] PIN_
F5
Analog Input Data[0]
2.5
-V LVTTL
ADC_IN [1] PIN_
F4
Analog Input Data[1]
2.5
-V LVTTL
ADC_IN [2] PIN_
J
8 Analog Input Data[2]
2.5
-V LVTTL
ADC_IN [3] PIN_
J9
Analog Input Data[3]
2.5
-V LVTTL
ADC_IN [4] PIN_
J4
Analog Input Data[4]
2.5
-V LVTTL
ADC_IN [5] PIN_
H3
Analog Input Data[5]
2.5
-V LVTTL
ADC_IN [6] PIN_
K5
Analog Input Data[6]
2.5
-V LVTTL
ADC_IN [7] PIN_
K6
Analog Input Data[7]
2.5
-V LVTTL
2
2
.
.
7
7
U
U
s
s
i
i
n
n
g
g
Q
Q
S
S
P
P
I
I
F
F
l
l
a
a
s
s
h
h
The board supports a 64M-bit serial NOR flash device for non-volatile storage, user data and
program. This device has a 4-bit data interface and uses 3.3V CMOS signaling standard.
Connections between MAX 10 FPGA and Flash are shown in
Figure 2-26 . Table 2-11 shows the
QSPI Flash pin assignments