Teledyne SP Devices ADQ7DC, Manual

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1.2.1 Data format
The ADC components of ADQ7DC has 14 bits resolution, while the data format inside the ADQ7DC
and out to the host PC is 16 bits. The 14 bits from the ADCs are MSB aligned in this 16 bit data word.
Thus initially the 2 LSBs are zero.
The number representation is 2’s complement. The full scale maximum code is then 32 767 and the full
scale minimum code is –32 768. Overflow or underflow at any position in the signal path will saturate
the data and turn on an overflow flag. See
Section 7.7 for more information on over- and under-flow.
The 2 LSBs may not be zero in the data output from the ADQ7DC. Calibration and other computations
in the FPGA may result in fractional result. This is not rounded to 14 bits in order to avoid adding com-
putational noise.
Example 1: A 14 bits sequence of data is subject to a gain calibration parameter of 1063. This means
that the digital word is corrected by 1063 / 1024,
Section 2.3 . Table 1 illustrate how the lowest bits con-
tain computation results. The analog signal level is calculated from Section 1.2.6 .
1.2.2 Calibration
During the factory calibration procedure the analog properties are measured and parameters for a digi-
tal compensation are computed. An analog deviation in the front-end is thus compensated for by the
inverse function in the digital signal processing part.
Example 2: The full scale signal range of the ADQ is measured in production and the
SetGainAndOff-
set
function is used for adjusting to the correct signal range.
1.2.3 Data acquisition nomenclature
Table 2 defines some key data acquisition terms.
Table 1: Example of how computation results sets the lowest two LSBs.
ADC RAW CODES
1
1. This is the raw codes from the ADC. It is 14 bits MSB aligned in 16 bit word. The 2 LSBs are thus 0.
GAIN CORRECTION DIGITAL CODE
LEVEL
2
2. This is the result from the gain compensation. The 2 LSBs now contain a fractional result from the
computation.
ACTUAL ANALOG
RANGE
ANALOG LEVEL
3
3. This is the corresponding analog signal that was present at the input at the time of measurement. See
Section 1.2.6 for details on how this is calculated.
0x0000 1063 / 1024 0x0000 1 Vpp 0.0 mV
0x0004 1063 / 1024 0x0004 1 Vpp 0.061mV
0x0008 1063 / 1024 0x0008 1 Vpp 0.122 mV
0x000B 1063 / 1024 0x000B 1 Vpp 0.168 mV
0x0010 1063 / 1024 0x0011 1 Vpp 0.259 mV
0x0014 1063 / 1024 0x0015 1 Vpp 0.320 mV
0x0018 1063 / 1024 0x0019 1 Vpp 0.381 mV
0x001B 1063 / 1024 0x001C 1 Vpp 0.427 mV