19-2233 PC2
2019-02-01
15(50)
ADQ7DC Manual
16-1796 PC2 2019-02-01
15(50)
• Start the experiment and subtract the timing reference from each record as
TIME_STAMP
=
TIME_STAMP_OF_RECORD
–
TIME_STAMP_REFERENCE
.
3. The third method is to apply an external trigger to reset the timestamp reset,
. This method
has the possibility to synchronize several boards to full precision of the external trigger. See
. The sequence of operation is:
•
DisarmTimestampSync
•
SetupTimestampSync
•
ArmTimestampSync
The number of reset pulses are counted and the information is stored in the record header,
. However, if there are no triggers accepted, there will be no record headers available. To verify
that there is activity going on, the number of reset pulses can also be read from a register via
GetTriggerBlockingGateCount
.
4. The fourth method is to reset the timestamp with the sync signal,
. The difference between
using the external trigger and the sync is that the external trigger has the a sample resolution while
the sync timing resolution is controlled by the Data Clock in the FPGA. Note that the backplane trig-
gers in –PXIe and –MTCA formats work in the same way as the sync signal.
#
DESCRIPTION
USER COMMAND
REF
a
External trigger input signal on front panel connector.
b
External sync input signal on front panel connector.
c
Other available sources (see
SetTriggerMode
for a list)
d
Select source for reseting timestamp.
SetupTimestampSync
DisarmTimeStampSync
ArmTimeStampSync
e
Timestamp counter value is reset at power-up of the digitizer.
f
Reset the timestamp counter on each pulse of the selected source.
Timestamp is then measuring time relative the previous reset signal.
g
h
Reset the timestamp counter only on the first pulse of the selected
signal. The external signal is then a systems synchronization signal.
i
The number of times the time stamp has been reset can be read from
a register.
GetTriggerBlockingGate
Count
Figure 6: Timestamp reset from external trigger.
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